Engineering Sciences/NOLTA-VLSI Design Technologies(Date:2006/01/10)

Presentation
表紙

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[Date]2006/1/10
[Paper #]
目次

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[Date]2006/1/10
[Paper #]
Implimentation of high-speed audiofingerprint system using FPGAs

Hisashi ISONAGA,  Yasushi INOGUCHI,  

[Date]2006/1/10
[Paper #]VLD2005-88,CPSY2005-44,RECONF2005-77
Voice Recognition LSI based on FTTSS

Tomotaka NAKANO,  Hu Gang Park,  Tetsuo FUNADA,  Akio KITAGAWA,  

[Date]2006/1/10
[Paper #]VLD2005-89,CPSY2005-45,RECONF2005-78
An LSI design to support Sound Finite Difference Time Domain Method

Daichi ITO,  Ryotaro KOBAYASHI,  Toshio SHIMADA,  

[Date]2006/1/10
[Paper #]VLD2005-90,CPSY2005-46,RECONF2005-79
Accelaration of Hydrosynamical Simulations using a FPGA board

Naohito NAKASATO,  Tsuyoshi HAMADA,  

[Date]2006/1/10
[Paper #]VLD2005-91,CPSY2005-47,RECONF2005-80
Programmable Numerical Function Generators Based on Quadratic Approximation : Architecture and Synthesis Method

Shinobu NAGAYAMA,  Tsutomu SASAO,  Jon T. BUTLER,  

[Date]2006/1/10
[Paper #]VLD2005-92,CPSY2005-48,RECONF2005-81
Implementation of Stream Application on Programmable Devices by C Level Design

Naohiro KATSURA,  Yohei HASEGAWA,  MANH TUAN Vu,  Takamasa KANAMORI,  Hideharu AMANO,  

[Date]2006/1/10
[Paper #]VLD2005-93,CPSY2005-49,RECONF2005-82
Multuiple Programming Method and Circuit Design for a Phase Change Nonvolatile Random Access Memory

Takatomi IZUMI,  Masashi TAKATA,  Kazuya NAKAYAMA,  Akio KITAGAWA,  

[Date]2006/1/10
[Paper #]VLD2005-94,CPSY2005-50,RECONF2005-83
Modification of monotonic route to reduce maximum density for single layer BGA package

Yoshitaka NOMURA,  Atsushi TAKAHASHI,  

[Date]2006/1/10
[Paper #]VLD2005-95,CPSY2005-51,RECONF2005-84
Boolean Equivalence Checking Using a Subset of First-Order Logic

Atsushi MORITOMO,  Kiyoharu HAMAGUCHI,  Toshinobu KASHIWABARA,  

[Date]2006/1/10
[Paper #]VLD2005-96,CPSY2005-52,RECONF2005-85
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[Date]2006/1/10
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[Date]2006/1/10
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[Date]2006/1/10
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