Engineering Sciences/NOLTA-VLSI Design Technologies(Date:2004/03/05)

Presentation
表紙

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[Date]2004/3/5
[Paper #]
目次

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[Date]2004/3/5
[Paper #]
Stereo Matching VLSI Processor Based on Hierarchically Parallel Memory Access

Haruka SASAKI,  Masanori HARIYAMA,  Michitaka KAMEYAMA,  

[Date]2004/3/5
[Paper #]VLD2003-150
Reconfigurable Adaptive FEC with Interleave

Kazunori SHIMIZU,  Jyunpei UCHIDA,  Yuichiro MIYAOKA,  Nozomu TOGAWA,  Masao YANAGISAWA,  Tatsuo OHTSUKI,  

[Date]2004/3/5
[Paper #]VLD2003-151
A CAM Processor Optimizing Method with Area Constraints

Yuichiro ISHIKAWA,  Jumpei UCHIDA,  Yuichiro MIYAOKA,  Nozomu TOGAWA,  Masao YANAGISAWA,  Tatsuo OHTSUKI,  

[Date]2004/3/5
[Paper #]VLD2003-152
An Power Reduction Technique for Baseband Processors in Digital Wireless Communications

Yusuke MAJIMA,  Kosuke TARUMI,  Hiroto YASUURA,  

[Date]2004/3/5
[Paper #]VLD2003-153
Investigation on Software Radio design for Front-end Signal Processing of Terrestrial OFDM receiver

Daigo KASHIMA,  Tomohisa WADA,  Shuji MURAKAMI,  

[Date]2004/3/5
[Paper #]VLD2003-154
Low-Power 10bit Pipelined ADC implementing FeedForward Control

Naoki ISODA,  Toshimasa MATSUOKA,  Kenji TANIGUCHI,  

[Date]2004/3/5
[Paper #]VLD2003-155
Development of direct methanol fuel cell for portable electrical devices

Hideyuki Ohzu,  

[Date]2004/3/5
[Paper #]VLD2003-156
A Retargetable Compiler in a Hardware/Software Cosynthesis System for Processor Cores with Packed SIMD Type Instruction Sets

Hisaharu KATOH,  Jumpei UCHIDA,  Yuichiro MIYAOKA,  Nozomu TOGAWA,  Masao YANAGISAWA,  Tatsuo OHTSUKI,  

[Date]2004/3/5
[Paper #]VLD2003-157
A Virtual IP Analogizing Algorithm in HW/SW Partitioning System

Yuichi ODA,  Jumpei UCHIDA,  Yuichiro MIYAOKA,  Nozomu TOGAWA,  Masayoshi TACHIBANA,  Masao YANAGISAWA,  Tatsuo OHTSUKI,  

[Date]2004/3/5
[Paper #]VLD2003-158
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[Date]2004/3/5
[Paper #]
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[Date]2004/3/5
[Paper #]