Engineering Sciences/NOLTA-VLSI Design Technologies(Date:2001/05/10)

Presentation
表紙

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[Date]2001/5/10
[Paper #]
目次

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[Date]2001/5/10
[Paper #]
Code Compression of Instruction ROM by Byte Pair Encoding

Atsushi MONZEN,  Hiroto YASUURA,  

[Date]2001/5/10
[Paper #]VLD2001-1
A Hardwareunit Generation Algorithm for Packed SIMD Type Functional Units of Digital Signal Processor Cores

Yuichiro MIYAOKA,  Nozomu TOGAWA,  Masao YANAGISAWA,  Tatsuo OHTSUKI,  

[Date]2001/5/10
[Paper #]VLD2001-2
Simulation Framework for Circuits on Plastic Cell Architecture (PCA)

Yuichi OKUYAMA,  Kenichi KURODA,  

[Date]2001/5/10
[Paper #]VLD2001-3
Architecture design and evaluation of wavelet transform unit for JPEG2000

Kyoko Ueda,  Yoshinori Takeuchi,  Akira Kitajima,  Masaharu Imai,  

[Date]2001/5/10
[Paper #]VLD2001-4
Improving Energy Efficiency via Timing Fault Tolerance

TOSHINORI SATO,  ITSUJIRO ARITA,  

[Date]2001/5/10
[Paper #]VLD2001-5
Practical Use of Module Interface Specifications for Design Verification

Hiroaki Iwashita,  Satoshi Kowatari,  Hiroshi Nagai,  

[Date]2001/5/10
[Paper #]VLD2001-6
A Survey of System Level Design Methods and Languages

Masayoshi TACHIBANA,  

[Date]2001/5/10
[Paper #]YLD2001-7
[OTHERS]

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[Date]2001/5/10
[Paper #]