Engineering Sciences/NOLTA-Signal Processing(Date:2007/10/18)

Presentation
表紙

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[Date]2007/10/18
[Paper #]
目次

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[Date]2007/10/18
[Paper #]
A Study of Frame Buffer Cache Architecture

Ryohei ISHIDA,  Yoshiyuki KATO,  

[Date]2007/10/18
[Paper #]SIP2007-109,ICD2007-98,IE2007-68
Vehicle Detection Algorithm Using Three-Dimensional Information and Its VLSI Architecture

Kensaku YAMASHITA,  Akio SASAKI,  Masanori HARIYAMA,  Michitaka KAMEYAMA,  

[Date]2007/10/18
[Paper #]SIP2007-110,ICD2007-99,IE2007-69
Image Processing VLSI Architecture Based on Data Compression and Its Application

Hisashi YOSHIDA,  Yasuhiro KOBAYASHI,  Masanori HARIYAMA,  Michitaka KAMEYAMA,  

[Date]2007/10/18
[Paper #]SIP2007-111,ICD2007-100,IE2007-70
A Car Navigation Processor Employing a 38.4GOPS Image Recognition Engine

Yoshiyuki Matsumoto,  Toru Baji,  Shoji Muramatsu,  

[Date]2007/10/18
[Paper #]SIP2007-112,ICD2007-101,IE2007-71
Super High Speed, Sub-sampling Motion Estimation Algorithm Employing Adaptively Assigned Search Window Sizes

Shimon Isaka,  Tadayoshi Enomoto,  

[Date]2007/10/18
[Paper #]SIP2007-113,ICD2007-102,IE2007-72
An Analog Moving-Object-Localization VLSI System Employing OR-Amplification of Pixel Activities

Yusuke NIKI,  Yasuo MANZAWA,  Satoshi KAMETANI,  Tadashi SHIBATA,  

[Date]2007/10/18
[Paper #]SIP2007-114,ICD2007-103,IE2007-73
Video compression LSI for Ubiquitous and Ambient Information Society

Takeshi IKENAGA,  

[Date]2007/10/18
[Paper #]SIP2007-115,ICD2007-104,IE2007-74
K-Means学習プロセッサシステムのためのマルチチップ・アーキテクチャ(システムLSIの応用と要素技術,専用プロセッサ,プロセッサ,DSP,画像処理技術及び一般)

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[Date]2007/10/18
[Paper #]SIP2007-116,ICD2007-105,IE2007-75
New Compact and Power-Efficient Implementations of Rank-Order-Filters and Sorting Engines Using Time-Domain Computation Technique

Liem T. NGUYEN,  Kiyoto ITO,  Tadashi SHIBATA,  

[Date]2007/10/18
[Paper #]SIP2007-117,ICD2007-106,IE2007-76
Mixed-Signal Simulation Methodology for a Highly Collision-Resistive RFID System

Naoki GOCHI,  Yohei FUKUMIZU,  Makoto NAGATA,  

[Date]2007/10/18
[Paper #]SIP2007-118,ICD2007-107,IE2007-77
Study on a TOPS scale architecture

Hiroshi SUZUKI,  Takao NISHITANI,  Bin Wu,  Hachiro FUJITA,  

[Date]2007/10/18
[Paper #]SIP2007-119,ICD2007-108,IE2007-78
Foreground Segmentation Using Spatio-Temporal Processing : A Study on TOPS DSP Architecture Driven Algorithm for Foreground Segmentation

Hiroaki TEZUKA,  Tomoyuki SUZUKI,  Takao NISHITANI,  

[Date]2007/10/18
[Paper #]SIP2007-120,ICD2007-109,IE2007-79
VLSI Architecture of Multi-Symbol CABAC Decoder for H.264/AVC High Profile

Kimiya KATO,  Ryoji HASHIMOTO,  Gen FUJITA,  Takao ONOYE,  

[Date]2007/10/18
[Paper #]SIP2007-121,ICD2007-110,IE2007-80
A Study on Geometric Correction for Projected Images Based on 3D Measurement

Toru TAKAHASHI,  Norihito NUMA,  Takafumi AOKI,  Satoshi KONDO,  

[Date]2007/10/18
[Paper #]SIP2007-122,ICD2007-111,IE2007-81
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[Date]2007/10/18
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[Date]2007/10/18
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[Date]2007/10/18
[Paper #]