Engineering Sciences/NOLTA-Reliability(Date:2014/11/19)

Presentation
表紙

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[Date]2014/11/19
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目次

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[Date]2014/11/19
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A study on automated arithmetic pipeline design on a multi-FPGA system

Yusuke HIRAI,  Katsuki KYAN,  Makoto ARAKAKI,  Hideharu AMANO,  Naoyuki FUJITA,  Yasunori OSANA,  

[Date]2014/11/19
[Paper #]RECONF2014-34
Implementation of Multi-dimensional FPGA array HPC system-Vocalise for Numerical simulation and its Performance Evaluation

Jiang LI,  Hiromasa KUBO,  Satoru YOKOTA,  Yuichi OGISHIMA,  Masatoshi SEKINE,  

[Date]2014/11/19
[Paper #]RECONF2014-35
Time Analysis of Appling Back Gate Bias for Reconfigurable Architectures

Hayate OKUHARA,  Hideharu AMANO,  

[Date]2014/11/19
[Paper #]RECONF2014-36
Mobile robot system based on hw/sw Complex System using 3D FPGA-Array System "Vocalise"

Hiromasa KUBO,  Jiang LI,  Satoru YOKOTA,  Yuuichi OGISHIMA,  Masatoshi SEKINE,  

[Date]2014/11/19
[Paper #]RECONF2014-37
An Image Recognition System Learning Feature Regions with Vocalise

Satoru YOKOTA,  Jiang LI,  Hiromasa KUBO,  Masatoshi SEKINE,  

[Date]2014/11/19
[Paper #]RECONF2014-38
Efficient FPGA resource allocation for HOG-based human detection

Masahiro OISHI,  Yuichiro SHIBATA,  Kiyoshi OGURI,  

[Date]2014/11/19
[Paper #]RECONF2014-39
Magnetic Resonance (MR) Safety of Implantable Medical Device : Current Status and Future Prospect

Kagayaki KURODA,  

[Date]2014/11/19
[Paper #]VLD2014-92,CPM2014-122,ICD2014-65,CPSY2014-77,DC2014-46,RECONF2014-40
Latest Development and Future Prospect of Mobile Display Technology

Yoshiharu NAKAJIMA,  

[Date]2014/11/19
[Paper #]VLD2014-93,CPM2014-123,ICD2014-66,CPSY2014-78,DC2014-47,RECONF2014-41
Design and Evaluation of High-speed Serial Communication Mechanism for FPGA-based ASIC Emulator

Takashi OKAMOTO,  Morihiro KUGA,  Motoki AMAGASAKI,  Masahiro IIDA,  Toshinori SUEYOSHI,  

[Date]2014/11/19
[Paper #]RECONF2014-42
Voice Recognition System using hw/sw Complex Guide to the Technical Report and Template

Yuichi OGISHIMA,  Siang LI,  Satoru YOKOTA,  Hiromasa KUBO,  Masatoshi SEKINE,  

[Date]2014/11/19
[Paper #]RECONF2014-43
Accelerating finite field arithmetic with a suitable word size

Aiko IWASAKI,  Yuichiro SHIBATA,  Kiyoshi OGURI,  Ryuichi HARASAWA,  

[Date]2014/11/19
[Paper #]RECONF2014-44
A 56-Gb/s Receiver Front-End with a CTLE and 1-Tap DFE in 20-nm CMOS

Yasufumi Sakai,  Takayuki Shibasaki,  Takumi Danjo,  Hisakatsu Yamaguchi,  Toshihiko Mori,  Yoichi Koyanagi,  Hirotaka Tamura,  

[Date]2014/11/19
[Paper #]VLD2014-96,CPM2014-127,ICD2014-70,CPSy2014-84,DC2014-50,RECONF2014-45
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[Date]2014/11/19
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Reprographic Reproduction outside Japan

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[Date]2014/11/19
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[Date]2014/11/19
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[Date]2014/11/19
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