Engineering Sciences/NOLTA-Reliability(Date:2010/01/19)

Presentation
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[Date]2010/1/19
[Paper #]
目次

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[Date]2010/1/19
[Paper #]
A study of software development environment for dynamic-reconfigurable processor MuCCRA-3

Kazuei HIRONAKA,  Katsunobu NISHIMURA,  Hideharu AMANO,  

[Date]2010/1/19
[Paper #]VLD2009-69,CPSY2009-51,RECONF2009-54
Reducing scheduling overheads in Dynamically Reconfigurable Processors

Ratna Krishnamoorthy,  Keshavan Varadarajan,  Mythri Alle,  Ranjani Narayan,  Masahiro Fujita,  S K Nandy,  

[Date]2010/1/19
[Paper #]VLD2009-70,CPSY2009-52,RECONF2009-55
Evaluation of Hardware/Software Partitioning Method with Consideration of Software Parallelization

Junya Matsunaga,  Michiaki Muraoka,  Dai Araki,  

[Date]2010/1/19
[Paper #]VLD2009-71,CPSY2009-53,RECONF2009-56
Evaluation using Applications for RC-OS which supports Reconfigurable Computer System

Kazuya TOKUNAGA,  Akira KOJIMA,  Tetsuo HIRONAKA,  

[Date]2010/1/19
[Paper #]VLD2009-72,CPSY2009-54,RECONF2009-57
A network deliverable hw/sw complex, video codec

Ryosuke KUROGI,  Kentaro HANAI,  Hakaru TAMUKOH,  Yuuichi KOBAYASHI,  Masatoshi SEKINE,  

[Date]2010/1/19
[Paper #]VLD2009-73,CPSY2009-55,RECONF2009-58
Development of Interdisciplinary Research Environment by Collaboration of e-Learning and Remote FPGA

Jaseong KIM,  Shingo YOSHIZAWA,  Yusaku KANETA,  Shin-ichi MINATO,  Hiroki ARIMURA,  Yoshikazu MIYANAGA,  

[Date]2010/1/19
[Paper #]VLD2009-74,CPSY2009-56,RECONF2009-59
FPGA Implementation of Discrete Wavelet Transform Using Impulse C

Takaaki MIYAJIMA,  Masatoshi ARAI,  Hideharu AMANO,  

[Date]2010/1/19
[Paper #]VLD2009-75,CPSY2009-57,RECONF2009-60
An FPGA Implementation of Array Processor Performing 3D-DCT Effectively

Yuki Ikegaki,  Hiroyuki Igarashi,  Toshiaki Miyazaki,  Stanislav G. Sedukhin,  

[Date]2010/1/19
[Paper #]VLD2009-76,CPSY2009-58,RECONF2009-61
Computer Aided Detection System Implementation for recognize cancer in Mammograms over an FPGA

Yessica SUAREZ-HERNANDEZ,  Sayaka AKIOKA,  Tsutomu YOSHINAGA,  Volodymyr PONOMARYOV,  Gonzalo DUCHEN-SANCHEZ,  

[Date]2010/1/19
[Paper #]VLD2009-77,CPSY2009-59,RECONF2009-62
A Non-Minimal Fully Adaptive Routing Using a Single-Flit Packet Structure

Yuri NISHIKAWA,  Michihiro KOIBUCHI,  Hiroki MATSUTANI,  Hideharu AMANO,  

[Date]2010/1/19
[Paper #]VLD2009-78,CPSY2009-60,RECONF2009-63
Design of Reconfigurable Logic Device based on Variable Grain Logic Cell

Kazuki INOUE,  Yasuhiro OKAMOTO,  Qian ZHAO,  Koumei YOSHIZAWA,  Hiroki YOSHO,  Masahiro KOGA,  Motoki AMAGASAKI,  Masahiro IIDA,  Morihiro KUGA,  Toshinori SUEYOSHI,  

[Date]2010/1/19
[Paper #]VLD2009-79,CPSY2009-61,RECONF2009-64
Residue-Binary Conversion Using Signed-Digit Number Arithmetic

Changjun JIANG,  Shugang WEI,  

[Date]2010/1/19
[Paper #]VLD2009-80,CPSY2009-62,RECONF2009-65
Implementation Method and Performance Evaluation of Residue Arithmetic Circuits Using Signed-Digit Number Representation

Mingda ZHANG,  Shugang WEI,  

[Date]2010/1/19
[Paper #]VLD2009-81,CPSY2009-63,RECONF2009-66
Hardware Specialization of Digital Filters for Vibration Control

Yasuaki TEZUKA,  Shuichi ICHIKAWA,  Yoshiyuki NODA,  

[Date]2010/1/19
[Paper #]VLD2009-82,CPSY2009-64,RECONF2009-67
A Dedicated Functional Unit Synthesis Algorithm with MISO Structures based on Partial Matching

Norihiro HASHIMOTO,  Nozomu TOGAWA,  Masao YANAGISAWA,  Tatsuo OHTSUKI,  

[Date]2010/1/19
[Paper #]VLD2009-83,CPSY2009-65,RECONF2009-68
Architecture of a Low-Power FPGA Based on Self-Adaptive Voltage Control

Shota ISHIHARA,  Zhengfan XIA,  Masanori HARIYAMA,  Michitaka KAMEYAMA,  

[Date]2010/1/19
[Paper #]VLD2009-84,CPSY2009-66,RECONF2009-69
Implementation of Power Reduction with Dynamically Dual-V_
Assignment to Dynamically Reconfigurable Processor Array

Yusuke UMAHASHI,  Toru SANO,  Satoshi KOYAMA,  Yoshiki SAITO,  Hideharu AMANO,  Kimiyoshi USAMI,  

[Date]2010/1/19
[Paper #]VLD2009-85,CPSY2009-67,RECONF2009-70
Granularity Optimization Method for AES Encryption Implementation on CUDA

Naoki NISHIKAWA,  Keisuke IWAI,  Takakazu KUROKAWA,  

[Date]2010/1/19
[Paper #]VLD2009-86,CPSY2009-68,RECONF2009-71
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