IEICE Technical Committee

Engineering Sciences/NOLTA-Hardware Security(Date:2020/03/04)

Presentation

An Automatic Method to Generalize Matrix-Vector Multiplication with Multiple Processors Considering the Efficiency of the Communications

Akihiro Goda(UT), Masahiro Fujita(UT),

[Date]2020-03-04
[Paper #]VLD2019-97,HWS2019-70

An EVBDD-based Design Verification for Elementary Function Generators

Hiroto Fukuhara(HCU), Shinobu Nagayama(HCU), Masato Inagi(HCU), Shin'ichi Wakabayashi(HCU),

[Date]2020-03-04
[Paper #]VLD2019-96,HWS2019-69

A Method to Decide Row-Shift Decomposability of Index Generation Functions

Tsunesada Kyoichiro(HCU), Shinobu Nagayama(HCU), Masato Inagi(HCU), Shin'ichi Wakabayashi(HCU),

[Date]2020-03-04
[Paper #]VLD2019-94,HWS2019-67

Additional Training Data Generation for Lithography Hotspot Detection by Modifying Existing Training Data

Gaku Kataoka(Hiroshima City Univ.), Masato Inagi(Hiroshima City Univ.), Shinobu Nagayama(Hiroshima City Univ.), Shin'ichi Wakabayashi(Hiroshima City Univ.),

[Date]2020-03-04
[Paper #]VLD2019-107,HWS2019-80

A Preliminary Study of Spectrum-based Feature Vectors for Lithography Hotspot Detection

Masato Inagi(Hiroshima City Univ.), Gaku Kataoka(Hiroshima City Univ.), Shinobu Nagayama(Hiroshima City Univ.), Shin'ichi Wakabayashi(Hiroshima City Univ.),

[Date]2020-03-04
[Paper #]VLD2019-108,HWS2019-81

MTJ-based Nonvolatile Flip-Flop Circuit Using Dual Power Supplies for Low-voltage Operation

Sosuke Akiba(SIT), Kimiyoshi Usami(SIT),

[Date]2020-03-04
[Paper #]VLD2019-99,HWS2019-72

A Study of Dynamic Power Optimization by Latch Insertion for Asynchronous RTL Models

Shogo Semba(UoA), Hiroshi Saito(UoA),

[Date]2020-03-04
[Paper #]VLD2019-100,HWS2019-73

Estimation method of process variation using an IDDQ test and retention characteristics of flip-flop

Shinichi Nishizawa(Fukuoka Univ.), Kazuhito(Saitama Univ.),

[Date]2020-03-04
[Paper #]VLD2019-102,HWS2019-75

Thermal-Aware Clock Skew Scheduling Based on Two-Graph Approach

Mineo Kaneko(JAIST),

[Date]2020-03-04
[Paper #]VLD2019-104,HWS2019-77

Standard Cell Library of Stack Structured Cells to Reduce LSI Maximum Power Consumption

Yuki Imai(Saitama Univ.), Shinichi Nishizawa(Fukuoka Univ.), Kazuhito Ito(Saitama Univ.),

[Date]2020-03-04
[Paper #]VLD2019-101,HWS2019-74

Gate Sizing for Programmable Delay Elements on Post-Silicon Delay Tuning

Kota Muroi(UoA), Yukihide Kohira(UoA),

[Date]2020-03-04
[Paper #]VLD2019-103,HWS2019-76

A Study of Arithmetic-Oriented Application Implementations for Via-Switch FPGA

Takashi Imagawa(Ritsumeikan Univ.), Yu Jaehoon(Tokyo Tech), Masanori Hashimoto(Osaka Univ.), Hiroyuki Ochi(Ritsumeikan Univ.),

[Date]2020-03-04
[Paper #]VLD2019-98,HWS2019-71

A Pin-Pair Routing Method for Length Difference Reduction in Set-Pair Routing

Kunihiko Wada(TokyoTech), Shimpei Sato(TokyoTech), Atsushi Takahashi(TokyoTech),

[Date]2020-03-04
[Paper #]VLD2019-95,HWS2019-68

Machine Learning Based Lithography Hotspot Detection Method and Evaluation

Hidekazu Takahashi(Tokyo Tech), Shimpei Sato(Tokyo Tech), Atsushi Takahashi(Tokyo Tech),

[Date]2020-03-04
[Paper #]VLD2019-106,HWS2019-79

Pixel-based Mask Optimization with Lagrangian Relaxation and Boundary Flipping

Rina Azuma(Univ. of Aizu), Yukihide Kohira(Univ. of Aizu), Tomomi Matsui(Tokyo Tech), Atsushi Takahashi(Tokyo Tech), Chikaaki Kodama(KIOXIA),

[Date]2020-03-04
[Paper #]VLD2019-105,HWS2019-78

[Memorial Lecture] Workload-aware Data-eviction Self-adjusting System of Multi-SCM Storage to Resolve Trade-off between SCM Data-retention Error and Storage System Performance

Reika Kinoshita(Chuo Univ.), Chihiro Matsui(Chuo Univ.), Atsuya Suzuki(Chuo Univ.), Shouhei Fukuyama(Chuo Univ.), Ken Takeuchi(Chuo Univ.),

[Date]2020-03-05
[Paper #]VLD2019-119,HWS2019-92

Fault-tolerant Design for Memristor Neural Network Using Checksum and Online Testing

Mamoru Ishizaka(NAIST), Michihiro Shintani(NAIST), Michiko Inoue(NAIST),

[Date]2020-03-05
[Paper #]VLD2019-112,HWS2019-85

Approximate Floating Point Multiplier based on Shifting Addition Using Carry Signal from Second-Highest-Bit

Jie Li(Waseda Univ.), Yi Guo(Waseda Univ.), Shinji Kimura(Waseda Univ.),

[Date]2020-03-05
[Paper #]VLD2019-120,HWS2019-93

Monte Carlo Tree Search for routing of delivery drone

Kota Iwasaki(Univ. of Kitakyushu), Yasuhiro Takashima(Univ. of Kitakyushu),

[Date]2020-03-05
[Paper #]VLD2019-109,HWS2019-82

HCP: History-based Congestion Prediction Algorithm for Network-on-Chip

Zhenyu Hu(Waseda Univ.), Michael Conrad Meyer(Waseda Univ.), Xin Jiang(NITKIT), Takahiro Watanabe(Waseda Univ.),

[Date]2020-03-05
[Paper #]VLD2019-110,HWS2019-83