IEICE Technical Committee

Engineering Sciences/NOLTA-Circuits and Systems(Date:2013/09/19)

Presentation

[Date]2013/9/19
[Paper #]

Efficient Transient Analysis of 3-D Stacked On-Chip Power Distribution Network with Power/Ground Through Silicon Vias by Using Block Latency Insertion Method

Daisei NAGATA, Tadatoshi SEKINE, Hideki ASAI,

[Date]2013/9/19
[Paper #]CAS2013-36,NLP2013-48

Multi-Rate Locally Implicit Latency Insertion Method for Fast Transient Analysis of Power Distribution Network

Takaaki HOJO, Shingo OKADA, Tadatoshi SEKINE, Hideki ASAI,

[Date]2013/9/19
[Paper #]CAS2013-37,NLP2013-49

A Study on Output Smoothing in Electric Power System with Multiple Homes using Battery

Yoshihiko YAMAGUCHI, Yoshihiko SUSUKI, Takashi HIKIHARA,

[Date]2013/9/19
[Paper #]CAS2013-38,NLP2013-50

Comparison of allocation methods of chargers for electric vehicles

Shun SATO, Keisuke NAKANO, Kazuyuki MIYAKITA,

[Date]2013/9/19
[Paper #]CAS2013-39,NLP2013-51

Optimization of Switching Phase of a Single Phase PWM DC-AC Inverter

Kazuya MORITA, Kenya JIN'NO,

[Date]2013/9/19
[Paper #]CAS2013-40,NLP2013-52

Analysis of a Manifold Piecewise Linear System with Switching Delay

Asuka NISHIMURA, Tadashi TSUBONE,

[Date]2013/9/19
[Paper #]CAS2013-41,NLP2013-53

A Study of Phase Dominating Energy-Absorption Rate in a Coupled Oscillator

MADAOKA Kubota, Takashi HIKIHARA,

[Date]2013/9/19
[Paper #]CAS2013-42,NLP2013-54

Theoretical Analysis on Quantization Error of β-Encoder

Takaki MAKINO, Yukiko IWATA, Yutaka JITSUMATSU, Masao HOTTA, Hao SAN, Kazuyuki AIHARA,

[Date]2013/9/19
[Paper #]CAS2013-43,NLP2013-55

Dynamic Binary Neural Networks: Storing a Periodic Orbit and its Stabilization

Ryota KOUZUKI, Toshimichi SAITO,

[Date]2013/9/19
[Paper #]CAS2013-44,NLP2013-56

A Study of The Packet Routing Method Using Mutually Connected Neural Networks

Tohru TAKAMIZAWA, Keisuke KIMURA, Takayuki KIMURA, Kenya JIN'NO,

[Date]2013/9/19
[Paper #]CAS2013-45,NLP2013-57

A Method of Clock Synchronization for Power Packet Dispatching : Parameters Optimization in Clock Synchronization

Yanzi ZHOU, Ryo TAKAHASHI, Takashi HIKIHARA,

[Date]2013/9/19
[Paper #]CAS2013-46,NLP2013-58

A parameter learning method for Piecewise-Constant Chaos Oscillator with spike trains of desired ISI

Tatsuro FURUSAWA, Tadashi TSUBONE,

[Date]2013/9/19
[Paper #]CAS2013-47,NLP2013-59

Basic Dynamics of Manifold Piece-wise Linear Systems on Torus

Kazuyuki KIMURA, Toshimichi SAITO,

[Date]2013/9/19
[Paper #]CAS2013-48,NLP2013-60

CSSAL: Charge Sharing Symmetric Adiabatic Logic : Case Study of Logic Circuit Design and Cryptographic Circuit Design

Yasuhiro TAKAHASHI, Cancio MONTEIRO, Toshikazu SEKINE,

[Date]2013/9/19
[Paper #]CAS2013-49,NLP2013-61

Operation Verification of Adiabatic Logic in Subthreshold Region

Kazunari KATO, Yasuhiro TAKAHASHI, Toshikazu SEKINE,

[Date]2013/9/19
[Paper #]CAS2013-50,NLP2013-62

Evaluation of Synaptic Weighting Circuit with Pulse-Based Memristor using Adibatic Driving

Haruki OGATA, Yasuhiro TAKAHASHI, Toshikazu SEKINE,

[Date]2013/9/19
[Paper #]CAS2013-51,NLP2013-63

LSI Implementation of a Secure Low-Power CSSAL Cellular Multiplier

Cando MONTEIRO, Yasuhiro TAKAHASHI, Toshikazi SEKINE,

[Date]2013/9/19
[Paper #]CAS2013-52,NLP2013-64

Properties of an adaptive IIR notch filter using variable step size

Kazunari DOI, Yegui XIAO, Koji HASEGAWA,

[Date]2013/9/19
[Paper #]CAS2013-53,NLP2013-65