Engineering Sciences/NOLTA-Circuits and Systems(Date:1996/06/24)

Presentation
表紙

,  

[Date]1996/6/24
[Paper #]
目次

,  

[Date]1996/6/24
[Paper #]
A Study on the Global Stability of Neural Networks with the Piecewise Linear Functions

Tetsuo NISHI,  Norikazu TAKAHASHI,  

[Date]1996/6/24
[Paper #]CAS96-1,VLD96-1,DSP96-21
A Study on Unstable Equilibrium Points of Transistor Circuits

Tetsuo NISHI,  Masato OGATA,  

[Date]1996/6/24
[Paper #]CAS96-2,VLD96-2,DSP96-22
A Globally Convergent Algorithm Using the Fixed-Point Homotopy for Solving Modified Nodal Equations

Kiyotaka YAMAMURA,  Tooru SEKIGUCHI,  Yasuaki INOUE,  

[Date]1996/6/24
[Paper #]CAS96-3,VLD96-3,DSP96-23
Design of Multirate Filters with Time-Domain Constraints

Masaki KATO,  Toshiyuki YOSHIDA,  Akinori NISHIHARA,  

[Date]1996/6/24
[Paper #]CAS96-4,VLD96-4,DSP96-24
Fault-Tolerant Meshes with Efficient Layouts

Toshinori Yamada,  Shuichi Ueno,  

[Date]1996/6/24
[Paper #]CAS96-5,VLD96-5,DSP96-25
Interval Analysis Using Linear Programming

Kiyotaka YAMAMURA,  Ai TOKUE,  Hitomi KAWATA,  

[Date]1996/6/24
[Paper #]CAS96-6,VLD96-6,DSP96-26
A Low Sensitive Active Filter Using Resistorless Difference Amplifier

Hirobumi ISHlKAWA,  Tetsuji SATOU,  Sumio FUKAI,  Mitsuo OKINE,  

[Date]1996/6/24
[Paper #]CAS96-7,VLD96-7,DSP96-27
Chain Active RLC Band Pass Filter : Compensation for input capacity, output resistance and gain error of emitter follower

Naoki TSUBOI,  Hirobumi ISHIKAWA,  Sumio FUKAI,  

[Date]1996/6/24
[Paper #]CAS96-8,VLD96-8,DSP96-28
Design of Multiple-Valued Switched-Capacitor Adder Using Signed-Digit Number Representation

Toru TABATA,  Fumio UENO,  Kaori KINO,  

[Date]1996/6/24
[Paper #]CAS96-9,VLD96-9,DSP96-29
On Empirical Distribution Functions for Binary Random Vectors

Tohru KOHDA,  Takahiro OHGA,  Akio TSUNEDA,  

[Date]1996/6/24
[Paper #]CAS96-10,VLD96-10,DSP96-30
Chaotic Series Analysis Using Radial Basis Function Model

Kenji MURAO,  Norimichi OZU,  Daisuke WADA,  

[Date]1996/6/24
[Paper #]CAS96-11,VLD96-11,DSP96-31
A High-Speed FPGA architecture

Tsunemasa Hayashi,  Atsushi Takahara,  Kennosuke Fukami,  

[Date]1996/6/24
[Paper #]CAS96-12,VLD96-12,DSP96-32
Prototyping of a Softcore Processor in Hardware/Software Codesign Environment

Fajar N. Eko,  Akihiko Inoue,  Hiroyuki Tomiyama,  Hiroto Yasuura,  

[Date]1996/6/24
[Paper #]CAS96-13,VLD96-13,DSP96-33
A Unit Selection Method for Multiplications with Various Word Lengths

Keisuke NAKAZONO,  Takeshi UCHIDA,  Hitoshi KIYA,  Akihiko YAMADA,  

[Date]1996/6/24
[Paper #]CAS96-14,VLD96-14,DSP96-34
Path Mapping based Delay Estimation for Technology Independent Circuits

Yutaka TAMIYA,  

[Date]1996/6/24
[Paper #]CAS96-15,VLD96-15,DSP96-35
[OTHERS]

,  

[Date]1996/6/24
[Paper #]