Electronics-Silicon Devices and Materials(Date:2015/01/20)

Presentation
表紙

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[Date]2015/1/20
[Paper #]
目次

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[Date]2015/1/20
[Paper #]
Analytical formulation of interfacial SiO_2 scavenging in HfO_2/SiO_2/Si stacks

Xiuyan Li,  Takeaki Yajima,  Tomonori Nishimura,  Kosuke Nagashio,  Akira Toriumi,  

[Date]2015/1/20
[Paper #]SDM2014-135
Dramatic Effects of Hydrogen-induced Out-diffusion of Oxygen from Ge Surface on Junction Leakage as well as Electron Mobility in n-channel Ge MOSFETs

Choong Hyun Lee,  Tomonori Nishimura,  Cimang Lu,  Shoichi Kabuyanagi,  Akira Toriumi,  

[Date]2015/1/20
[Paper #]SDM2014-136
High I_/I_ Ge-source Ultrathin Body Strained-SOI Tunnel FETs : Impact of Channel Strain, MOS Interfaces and Back Gate on the Electrical Properties

Minsoo KIM,  Yuki K. WAKABAYASHI,  Ryosho NAKANE,  Masafumi YOKOYAMA,  Mitsuru TAKENAKA,  Shinichi TAKAGI,  

[Date]2015/1/20
[Paper #]SDM2014-137
High-performance Tri-gate Poly-Ge Junction-less p- and n-MOSFETs Fabricated by Flash Lamp Annealing Process

Koji USUDA,  Yoshiki KAMATA,  Yuuichi KAMIMUTA,  Takahiro MORI,  Masahiro KOIKE,  Tsutomu TEZUKA,  

[Date]2015/1/20
[Paper #]SDM2014-138
Coupled Monte Carlo Simulation of Transient Electron-Phonon Transport in Small FETs

Yoshinari KAMAKURA,  ADISUSILO Indra NUR,  Kentaro KUKITA,  Go WAKIMURA,  Syunsuke KOBA,  MORI Nobuya /,  

[Date]2015/1/20
[Paper #]SDM2014-139
High-precision Wafer-level Cu-Cu Bonding for 3DICs

Masashi OKADA,  Isao SUGAYA,  Hajime MITSUISHI,  Hidehiro MAEDA,  Shigeto IZUMI,  Hosei NAKAHIRA,  Kazuya OKAMOTO,  

[Date]2015/1/20
[Paper #]SDM2014-140
Three-Dimensional Integrated CMOS Image Sensors with Pixel-Parallel A/D Converters Fabricated by Direct Bonding of SOI Layers

Masahide GOTO,  Kei HAGIWARA,  Yoshinori IGUCHI,  Hiroshi OHTAKE,  Takuya SARAYA,  Masaharu KOBAYASHI,  Eiji HIGURASHI,  Hiroshi TOSHIYOSHI,  Toshiro HIRAMOTO,  

[Date]2015/1/20
[Paper #]SDM2014-141
Low power and high memory density STT-MRAM for embedded cache memory using advanced perpendicular MTJ integrations and asymmetric compensation techniques

Kazutaka IKEGAMI,  Hiroki NOGUCHI,  Chikayoshi KAMATA,  Minoru AMANO,  Keiko ABE,  Keiichi KUSHIDA,  Eiji KITAGAWA,  Takao OCHIAI,  Naoharu SHIMOMURA,  Shogo ITAI,  Daisuke SAIDA,  Chika TANAKA,  Atsushi KAWASUMI,  Hiroyuki HARA,  Junichi ITO,  Shinobu FUJITA,  

[Date]2015/1/20
[Paper #]SDM2014-142
Accurate Prediction of PBTI Lifetime for N-type Fin-Channel Tunnel FETs

Wataru MIZUBAYASHI,  Takahiro MORI,  Koichi Fukuda,  Yongxun LIU,  Takashi MATSUKAWA,  Yuki ISHIKAWA,  Kazuhiko ENDO,  Shinichi O'UCHI,  Junichi TSUKADA,  Hiromi YAMAUCHI,  Shinji MIGITA,  Yukinori MORITA,  Hiroyuki OTA,  Meishoku MASAHARA,  

[Date]2015/1/20
[Paper #]SDM2014-143
16 nm FinFET High-k/Metal-gate 256-kbit 6T SRAM macros with Wordline Overdriven Assist

Makoto YABUUCHI,  Masao MORIMOTO,  Yasumasa TSUKAMOTO,  Shinji TANAKA,  Koji TANAKA,  Miki TANAKA,  Koji NII,  

[Date]2015/1/20
[Paper #]SDM2014-144
Scaling Breakthrough for Analog/Digital Circuits by Suppressing Variability and Low-Frequency Noise for FinFETs by Amorphous Metal Gate Technology

Takashi MATSUKAWA,  Koichi FUKUDA,  Yongxun LIU,  Junichi TSUKADA,  Hiromi YAMAUCHI,  Yuki ISHIKAWA,  Kazuhiko ENDO,  Shin-ichi OUCHI,  Shinji MIGITA,  Wataru MIZUBAYASHI,  Yukinori MORITA,  Hiroyuki OTA,  Meishoku MASAHARA,  

[Date]2015/1/20
[Paper #]SDM2014-145
Experimental Realization of Complementary p- and n- Tunnel FinFETs with Subthreshold Slopes of Less than 60 mV/decade and Very Low (pA/μm) Off-Current on a Si CMOS Platform

Yukinori MORITA,  Takahiro MORI,  Koichi FUKUDA,  Wataru MIZUBAYASHI,  Shinji MIGITA,  Kazuhiko ENDO,  Takashi MATSUKAWA,  Shin-ichi O'UCHI,  Yongxun LIU,  Meishoku MASAHARA,  Hiroyuki OTA,  

[Date]2015/1/20
[Paper #]SDM2014-146
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[Date]2015/1/20
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[Date]2015/1/20
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[Date]2015/1/20
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[Date]2015/1/20
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