エレクトロニクス-シリコン材料・デバイス(開催日：2009/06/17)

タイトル/著者/発表日/資料番号
表紙

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[発表日]2009/6/17
[資料番号]
目次

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[発表日]2009/6/17
[資料番号]
CMOS-based Power Amplifiers Operating at Quasi-Millimeter and Millimeter Waveband

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[発表日]2009/6/17
[資料番号]ED2009-50,SDM2009-45
Advanced magnetic tunnel junctions for hybrid spintronics/CMOS circuits

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[発表日]2009/6/17
[資料番号]ED2009-51,SDM2009-46
Transient characteristic of fabricated Magnetic Tunnel Junction (MTJ) programmed with CMOS circuit

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[発表日]2009/6/17
[資料番号]ED2009-52,SDM2009-47
Study of the DC Performance of Fabricated Magnetic Tunnel Junction Integrated on Back-end Metal Line of CMOS Circuits

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[発表日]2009/6/17
[資料番号]ED2009-53,SDM2009-48
Analysis on the Behavior of a Low Voltage Triggered SCR ESD Clamp Circuit in Comparison between the Standard Transmission Line Pulse System and the Very Fast Transmission Line Pulse System

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[発表日]2009/6/17
[資料番号]ED2009-54,SDM2009-49
Current Controlled MOS Current Mode Logic with Auto-detection of Threshold Voltage Fluctuation

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[発表日]2009/6/17
[資料番号]ED2009-55,SDM2009-50
A V-band Injection-Locked Frequency Divider with Low Supply Voltage in 0.13-μm Si RFCMOS Technology

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[発表日]2009/6/17
[資料番号]ED2009-56,SDM2009-51
A Statistical Analysis of Distributions of RTS Characteristics by Wide-Range Sampling Frequencies

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[発表日]2009/6/17
[資料番号]ED2009-57,SDM2009-52
A 0.18μm CMOS over 10Gb/s 10-PAM Serial Link Receiver

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[発表日]2009/6/17
[資料番号]ED2009-58,SDM2009-53
A CMOS over 12.8Gb/s 10-PAM transmitter for chip-to-chip communications

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[発表日]2009/6/17
[資料番号]ED2009-59,SDM2009-54
Fundamental study of a composite right/left-handed transmission line with self-multiplexed properties toward functional wireless interconnects

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[発表日]2009/6/17
[資料番号]ED2009-60,SDM2009-55
Metrology of microscopic properties of graphene on SiC

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[発表日]2009/6/17
[資料番号]ED2009-61,SDM2009-56
Theoretical study on graphene field-effect transistors

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[発表日]2009/6/17
[資料番号]ED2009-62,SDM2009-57
Electrical characteristics of OFETs with thin gate dielectric

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[発表日]2009/6/17
[資料番号]ED2009-63,SDM2009-58
Design of 30nm FinFET with Halo Structure

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[発表日]2009/6/17
[資料番号]ED2009-64,SDM2009-59
Design and Simulation of Self-Aligned Vertical Island Single Electron Transistor (VI-SET) with Electrical Tunneling Barrier

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[発表日]2009/6/17
[資料番号]ED2009-65,SDM2009-60
Simulation and Experiment of Liquid-Phase Microjoining Using Cone-Shaped Compliant Bump

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[発表日]2009/6/17
[資料番号]ED2009-66,SDM2009-61
A New Combination of RSD and Inside Spacer Thin Film Transistor

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[発表日]2009/6/17
[資料番号]ED2009-67,SDM2009-62
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