Electronics-Silicon Devices and Materials(Date:2008/03/07)

Presentation
表紙

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[Date]2008/3/7
[Paper #]
目次

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[Date]2008/3/7
[Paper #]
15nm Planar Bulk SONOS-type Memory with Double Junstion Tunnel Layers

RYUJI OHBA,  YUICHIRO MITANI,  NAOHARU SUGIYAMA,  SHINOBU FUJITA,  

[Date]2008/3/7
[Paper #]SDM2007-273
Fabrication and characterization of oxide-channel ferroelectric-gate nonvolatile memory device

Hiroshi Shibata,  Tomohiro Oiwa,  Eisuke Tokumitsu,  

[Date]2008/3/7
[Paper #]SDM2007-274
Characteristics of metal-ferroelectric-insulartor-semiconductor structures based on poly (vinylidene fluoride-trifluoroethylene)

Joo Won Yoon,  Shun-ichiro Ohmi,  Hiroshi Ishiwara,  

[Date]2008/3/7
[Paper #]SDM2007-275
Compliant Micro-Bumps for 3D Stacked-Chip LSIs with High Density Interconnection Implemented at Low Temperature

Naoya WATANABE,  Yutaka IWASAKI,  Tanemasa ASANO,  

[Date]2008/3/7
[Paper #]SDM2007-276
Through-silicon Via Interconnection for 3D Integration Using Room-temperature Bonding

Naotaka Tanaka,  Yasuhiro Yoshimura,  Michihiro Kawashita,  Toshihide Uematsu,  Takahiro Naito,  Takashi Akazawa,  

[Date]2008/3/7
[Paper #]SDM2007-277
Realistic future trend of non-volatile semiconductor memory and feasibility study of ultra-low-cost high-speed universal non-volatile memory

Shigeyoshi Watanabe,  

[Date]2008/3/7
[Paper #]SDM2007-278
New design technology of independent-gate controlled Double-Gate transistor for LSI

Yu Hiroshima,  Keisuke Okamoto,  Keisuke Koizumi,  Shigeyoshi Watanabe,  

[Date]2008/3/7
[Paper #]SDM2007-279
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[Date]2008/3/7
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[Date]2008/3/7
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[Date]2008/3/7
[Paper #]