Electronics-Silicon Devices and Materials(Date:2002/06/24)

Presentation
表紙

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[Date]2002/6/24
[Paper #]
目次

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[Date]2002/6/24
[Paper #]
FEOL Process for Sub-100nm DRAM

Gyoyoung Jin,  Siyoung Choi,  Jinhwa Heo,  

[Date]2002/6/24
[Paper #]SDM2002-66
A new DRAM Cell for SoC (System on a Chip) Devices : Planar DRAM Cell, Based On Logic Process

Seoyong CHI,  Jeongho CHO,  Yongcheol JEONG,  Choongho HWANG,  Junghwan LEE,  

[Date]2002/6/24
[Paper #]SDM2002-67
ELFIN (ELevated Field INsulator) and SEP (S/D Elevated by Poly-Si Plugging) Process for Ultra-Thin SOI MOSFETs

Jong-Wook LEE,  Yukisige SAITOH,  Risho KOH,  Shigeharu YAMAGAMI,  Hitoshi WAKABAYASHI,  Tohru MOGAMI,  

[Date]2002/6/24
[Paper #]SDM2002-68
Effects of Fluorine Incorporation on the Negative-Bias-Temperature Instability (NBTI) of P-Channel MOSFETs

Wan-Ju CHIANG,  Da-Yuan LEE,  Horng-Chih LIN,  Wen-Tai LU,  Tiao-Yuan HUANG,  

[Date]2002/6/24
[Paper #]SDM2002-69
DESIGN OF A NOVEL LOGARITHMIC AMPLIFIER WITH A TWO-STEP LINEAR LIMIITING TECHNIQUE

Sooyeon Kim,  Hyunryoung Cho,  Sangki Kim,  Minkyu Song,  

[Date]2002/6/24
[Paper #]SDM2002-70
DESIGN OF A 3V 6-BIT 900MSPS CMOS A/D CONVERTER WITH AN IMPROVED DYNAMIC LATCH

Jinho Oh,  Minkyu Song,  

[Date]2002/6/24
[Paper #]SDM2002-71
Fast SoC Design Methodology Using Reusable Intellectual Property : ASIC Design of IC Card Interface Controller Using Reusable Intellectual Property

Seung-Eun Lee,  Won-Seok Oh,  Jin Park,  Sung-Chul Lee,  Jong-Chan Choi,  

[Date]2002/6/24
[Paper #]SDM2002-72
A Low Power Highly linear Cascoded Multiple Gated Transistor CMOS RF Amplifier with 10dB IP3 Improvement

Tae Wook Kim,  Bonkee Kim,  Ilku Nam,  Beomkyu Ko,  Kwyro Lee,  

[Date]2002/6/24
[Paper #]SDM2002-73
Synchronous Mirror Delay for Multi-phase Locking

Yong Jin Yoon,  Jong Duk Lee,  Byung Gook Park,  Nam Seog Kim,  Uk Rae Cho,  Hyun Geun Byun,  

[Date]2002/6/24
[Paper #]SDM2002-74
High-Voltage MOS Devices for Flat Panel Display Drivers

Pyong-Su Kwag,  Mueng-Ryul Lee,  Oh-Kyong Kwon,  

[Date]2002/6/24
[Paper #]SDM2002-75
A Novel Power MOSFET Structure with Split P-well and Split Poly Design

Feng-Tso Chien,  Kou-Way Tu,  Shin-Tzung Su,  Ching-Ling Cheng,  

[Date]2002/6/24
[Paper #]SDM2002-76
High Energy Radiation Degradation of High Speed Diodes for Space Applications

J.S. Laird,  T. Hirao,  S. Onoda,  H. Mori,  H. Itoh,  

[Date]2002/6/24
[Paper #]SDM2002-77
Design of a CMOS DC-DC Converter : Adaptive CMOS DC-DC Converter for a Portable Battery Powered Systems

Won-Seok Oh,  Seung-Eun Lee,  Jin Park,  Sung-Chul Lee,  Jong-Chan Choi,  

[Date]2002/6/24
[Paper #]SDM2002-78
A New Junction Termination in Power Semiconductor Devices employing Trench

Jae-Keun OH,  Min-Woo HA,  Kwang-Seok SEO,  Yearn-Ik CHOI,  Min-Koo Han,  

[Date]2002/6/24
[Paper #]SDM2002-79
Design and Fabrication of SiC RESURF MOSFETs

Hajime Kosugi,  Taichi Hirao,  Hiroshi Yano,  Jun Suda,  Tsunenobu Kimoto,  Hiroyuki Matsunami,  

[Date]2002/6/24
[Paper #]SDM2002-80
The relationship of Gate Length to RF Characteristics of SiC-MESFETs : RF Characteristics of Short-Channel SiC-MESFETs

Manabu ARAI,  Hirotake HONDA,  Makoto OGATA,  Hiroshi SAWAZAKI,  Shuichi ONO,  

[Date]2002/6/24
[Paper #]SDM2002-81
An Effective Extraction of Distributed RLC Circuit Model for Multi-level Interconnects by Layout-Fracturing Algorithm

Sukin YOON,  Taeyoung WON,  

[Date]2002/6/24
[Paper #]SDM2002-82
A Novel Meshing Scheme for Numerical Simulation of Semiconductor Process and Device with Arbitrary Topography

Ohseob Kwon,  Sangho Yoon,  Yountae Kim,  Taeyoung Won,  

[Date]2002/6/24
[Paper #]SDM2002-83
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