Electronics-Silicon Devices and Materials(Date:2001/07/27)

Presentation
表紙

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[Date]2001/7/27
[Paper #]
目次

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[Date]2001/7/27
[Paper #]
Technology for High-speed and Low-power microprocessors

Kunio Uchiyama,  Takayuki Kawahara,  Takehiro Shimizu,  Masayuki Miyazaki,  Hiroyuki Mizuno,  

[Date]2001/7/27
[Paper #]SDM2001-129,ICD2001-52
A 0.9-μA Standby Current DSP Core Using Improved ABC-MT-CMOS Circuit

Hiromi Notani,  Masayuki Koyama,  Ryuji Mano,  Hiroshi Makino,  Yoshio Matsuda,  

[Date]2001/7/27
[Paper #]SDM2001-130,ICD2001-53
Design Methodology of High Performance Microprocessor using Ultra-Low Threshold Voltage CMOS

Tamotsu Miyake,  Takeo Yamashita,  Norikatsu Asari,  Hideki Sekisaka,  Toru Sakai,  Kazuhiro Matsuura,  Atsushi Wakahara,  Hideyuki Takahashi,  Toru Hiyama,  Kazuhisa Miyamoto,  Kazutaka Mori,  

[Date]2001/7/27
[Paper #]SDM2001-131,ICD2001-54
Architecture of High Performance Field Programmable VLSI Processor

Naotaka Ohsawa,  Masanori Hariyama,  Michitaka Kameyama,  

[Date]2001/7/27
[Paper #]SDM2001-132,ICD2001-55
A Pixel-Level Automatic Calibration Circuit Scheme for Sensing Initialization of a Capacitive Fingerprint Sensor LSI

H. Morimura,  S. Shigematsu,  T. Shimamura,  K. Machida,  H. Kyuragi,  

[Date]2001/7/27
[Paper #]SDM2001-133,ICD2001-56
A Threshold Logic-Based High-Speed Hamming Distance Detector and its Evaluation

Hiroaki YAMAOKA,  Kunihiro ASADA,  

[Date]2001/7/27
[Paper #]SDM2001-134,ICD2001-57
Device Consideration of Variable Threshold Voltage CMOS Circuits

Toshiro Hiramoto,  

[Date]2001/7/27
[Paper #]SDM2001-135,ICD2001-58
Comparison of Measurement Methods of Interface Trap Density for n-MOSFETs with Si-Implanted Gate-SiO_2

Toshihiro Matsuda,  Ryosuke Takezawa,  Kazunori Arakawa,  Masahiro Yasuda,  Takashi Ohzone,  Etsumasa Kameda,  

[Date]2001/7/27
[Paper #]SDM2001-136,ICD2001-59
Performance Improvement of Metal Gate CMOS Technologies

S. Matsuda,  H. Yamakawa,  A. Azuma,  Y. Toyoshima,  

[Date]2001/7/27
[Paper #]SDM2001-137,ICD2001-60
A study of analog characteristics of CMOS with heavily nitrided NO oxynitrides

Tatsuya Ohguro,  Takeshi Nagano,  Makoto Fujiwara,  Mariko Takayanagi,  Kei Shimizu,  Hisayo Momose,  Shinichi Nakamura,  Yoshiaki Toyoshima,  

[Date]2001/7/27
[Paper #]SDM2001-138,ICD2001-61
Low Resistivity TaNx/Ta/TaNx Metal Gate Si_3N_4-MNS Technology Featuring Low-Temperature Processing

Ichiro Ohshima,  Hiroyuki Shimada,  Shin-ichi Nakao,  Weitao Cheng,  Yasuhiro Ono,  Masaki Hirayama,  Shigetoshi Sugawa,  Tadahiro Ohmi,  

[Date]2001/7/27
[Paper #]SDM2001-139,ICD2001-62
テトラクロロシラン-シリコン窒化膜によるボロン突き抜けの抑制および高性能デュアルゲートDRAMの実現

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[Date]2001/7/27
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Low-Power-LSI Technologies in Sub-100-nm Era : Is it for Differentiation or Just for Admission?-Panel Discussion-

Tadayosi Enomoto,  Kazuo Yano,  Toshiro Hiramoto,  Tadahiro Kuroda,  Kunio Uchiyama,  Akira Matsuzawa,  Takakuni Douseki,  Hideo Ohira,  

[Date]2001/7/27
[Paper #]SDM2001-141,ICD2001-64
[OTHERS]

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[Date]2001/7/27
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