Electronics-Silicon Devices and Materials(Date:1994/12/16)

Presentation
表紙

,  

[Date]1994/12/16
[Paper #]
目次

,  

[Date]1994/12/16
[Paper #]
[CATALOG]

,  

[Date]1994/12/16
[Paper #]
A Design of Redundant Circuits for large and Ultra High-speed Memory LSI's

Kenichi Fukui,  Takashi Akioka,  Kinya Mitsumoto,  Yoshikazu Iida,  Noboru Akiyama,  

[Date]1994/12/16
[Paper #]SDM94-163,ICD94-166
A 6-ns 4-Mb CMOS SRAM with offset-Voltage Insensitive Current Sense Amplifiers

Koichiro Ishibashi,  Kunihiro Komiyaji,  Koichi Takasugi,  Akira Fukami,  Takahiro Nagano,  Takashi Nishida,  Toshiaki Yamanaka,  Naotaka Hashimoto,  Hiroshi Toyoshima,  Nagatoshi Ohki,  

[Date]1994/12/16
[Paper #]SDM94-164,ICD94-167
1V-Operation Memory Macrocells with Multithreshold CMOS Technology

Nobutaro Shibata,  Shigeru Date,  Sin'ichiro Mutoh,  Junzo Yamada,  

[Date]1994/12/16
[Paper #]SDM94-165,ICD94-168
SRAM Technology of 10μm^2 Full CMOS Cells for 0.25μm Logic Device s

Masaki Katsube,  Tetsuo Izawa,  Yuji Yokoyama,  Ko-ichi Hashimoto,  E-ichi Kawamura,  Atsuo Shimizu,  Hideo Takagi,  Fumihiko Inoue,  Hiroshi Shimizu,  Kazuto Furumochi,  Hiroshi Goto,  Seiichirou Kawamura,  Kiyoshi Watanabe,  Keizo Aoyama,  

[Date]1994/12/16
[Paper #]SDM94-166,ICD94-169
An Over-Evasure Detection Technique for Tightening Vth Distribution for Low Voltage Operation NOR type Flash Memory

Yoshikazu Miyawaki,  Takeshi Nakayama,  Masa-aki Mihara,  Shinji Kawai,  Minoru Ohkawa,  Natsuo Ajika,  Masahiro Hatanaka,  Yasushi Terada,  Tsutomu Yoshihara,  

[Date]1994/12/16
[Paper #]SDM94-167,ICD94-170
An application of Low dielectric SiOF film on 0.35μm CMOS

Jiro Ida,  Atsushi Ohotomo,  Takashi Usami,  Masaki Yoshimaru,  Kimiaki Shimokawa,  Akio Kita,  Hiroshi Onoda,  Masayoshi Ino,  

[Date]1994/12/16
[Paper #]SDM94-168,ICD94-171
Effects of Floating Gate Structure on Reliability in Flash Memories

Tetsuo Adachi,  Masataka Kato,  Toshihiro Tanaka,  Masahiro Ushiyama,  Tokuo Kure,  Tadao Morimoto,  Naoki Miyamoto,  kinn kume,  

[Date]1994/12/16
[Paper #]SDM94-169,ICD94-172
Diagonal Bit Line Configuration COB Stacked Capacitor 1G DRAM Cell

Ryuichi Oikawa,  Kentaro Shibahara,  Hidemitsu Mori,  Sadayuki Ohnishi,  Ken Nakajima,  Hiroshi Yamashita,  Katsushi Itoh,  Yoshikatsu Kojima,  Satoshi Kamiyama,  Keiji Watanabe,  Takehiko Hamada,  Kuniaki Koyama,  

[Date]1994/12/16
[Paper #]SDM94-170,ICD94-173
Low-Temperature Process for Ta_2O_5 Capacitor DRAMs

Masato Sakao,  Yoshihiro Takaishi,  Satoshi Kamiyama,  Hiroshi Suzuki,  Hirohito Watanabe,  

[Date]1994/12/16
[Paper #]SDM94-171,ICD94-174
[OTHERS]

,  

[Date]1994/12/16
[Paper #]