Electronics-Silicon Devices and Materials(Date:1994/12/15)

Presentation
表紙

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[Date]1994/12/15
[Paper #]
目次

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[Date]1994/12/15
[Paper #]
Automatic Voltage-Swing Reduction(AUR)Scheme for Ultra Low Power DRAMs

Masaki Tsukude,  Masakazu Hirose,  Shigeki Tomishima,  Takahiro Tsuruda,  Shigehiro Kuge,  Tadato Yamagata,  Kazutami Arimoto,  

[Date]1994/12/15
[Paper #]SDM94-157,ICD94-160
Block-Independent Redundant Cell Array Scheme for 256Mb DRAM

Atsushi Hatakeyama,  Masato Matsumiya,  Toshiya Uchida,  Tadao Aikawa,  Shinya Fujioka,  Shuusaku Yamaguchi,  Makoto Koga,  Masao Taguchi,  

[Date]1994/12/15
[Paper #]SDM94-158,ICD94-161
Block-Independent Redundant Cell Array Scheme for 256Mb DRAM

Shinichiro Shiratake,  Daisaburo Takashima,  Takehiro Hasegawa,  Hiroaki Nakano,  Yukihito Ohwaki,  Shigeyoshi Watanabe,  Kazunori Ohuchi,  Fujio Masuoka,  

[Date]1994/12/15
[Paper #]SDM94-159,ICD94-162
A Multi-Way On-Chip Cache Scheme for Giga-Bit DRAMs

Kazuhiko Takahashi,  Yasuhiro Tanaka,  Tetsuya Tanabe,  Satoru Tanoi,  Sanpei Miyamoto,  Yoshio Ohtsuki,  

[Date]1994/12/15
[Paper #]SDM94-160,ICD94-163
Circuit Technologies for 200MHz 16Mbit Synchronous DRAM with Block Access Mode

Atsushi Fujiwara,  Kazuhiro Matsuyama,  Hirohito Kikukawa,  Masashi Agata,  Shunichi Iwanari,  Minako Fukumoto,  Toshio Yamada,  Tsutomu Fujita,  

[Date]1994/12/15
[Paper #]SDM94-161,ICD94-164
A Complementary Gain Cell Technology for Sub-1V Supply DRAM's

Shoji Shukuri,  Tokuo Kure,  Takashi Nishida,  

[Date]1994/12/15
[Paper #]SDM94-162,ICD94-165
[OTHERS]

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[Date]1994/12/15
[Paper #]