Electronics-Superconductive Electronics(Date:2009/10/13)

Presentation
表紙

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[Date]2009/10/13
[Paper #]
目次

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[Date]2009/10/13
[Paper #]
A Logic Design Verification Method for SFQ Circuits Considering Pipeline Processing Behavior

Motoki SATO,  Masamitsu TANAKA,  Kazuyoshi TAKAGI,  Naofumi TAKAGI,  

[Date]2009/10/13
[Paper #]SCE2009-17
A Clock Line for a Large Scale Reconfigurable Data Paths Processor

Irina KATAEVA,  Hiroyuki AKAIKE,  Akira FUJIMAKI,  

[Date]2009/10/13
[Paper #]SCE2009-18
Design of SFQ Floating-Point Units Using Nb Advanced Process

Toshiki Kainuma,  Yasuhiro Shimamura,  Fumishige Miyaoka,  Yuki Yamanashi,  Nobuyuki Yoshikawa,  Akira Fujimaki,  Naofumi Takagi,  Kazuyoshi Takagi,  

[Date]2009/10/13
[Paper #]SCE2009-19
Investigation of Dynamically Reconfigurable Single Flux Quantum Logic Gates

Yuki YAMANASHI,  Ichiro OKAWA,  Nobuyuki YOSHIKAWA,  

[Date]2009/10/13
[Paper #]SCE2009-20
Access Time Measurement of 64kb Josephson/CMOS Hybrid Memories using SFQ Time-to-Digital Converter

Yuji OKAMOTO,  Heejoung PARK,  Hyunjoo JIN,  Kenta YAGUCHI,  Yuki YAMANASHI,  Nobuyuki YOSHIKAWA,  

[Date]2009/10/13
[Paper #]SCE2009-21
Analysis of gray zone in QOSs

Shigeyuki MIYAJIMA,  Yosuke HIGASHI,  Isao NAKANISHI,  Akira FUJIMAKI,  

[Date]2009/10/13
[Paper #]SCE2009-22
Development of SFQ circuit for compact neutron detector

Isao NAKANISHI,  Shigeyuki MIYAJIMA,  Yosuke HIGASHI,  Akira FUJIMAKI,  

[Date]2009/10/13
[Paper #]SCE2009-23
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[Date]2009/10/13
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[Date]2009/10/13
[Paper #]
奥付

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[Date]2009/10/13
[Paper #]