Electronics-Integrated Circuits and Devices(Date:2017/07/31)

Presentation
[Invited Talk] Development of fundamental technologies toward silicon quantum computers

Tetsuo Kodera(Tokyo Inst. of Tech.),  

[Date]2017-07-31
[Paper #]SDM2017-36,ICD2017-24
[Invited Talk] A Cross Point Cu-ReRAM with a Novel OTS Selector for Storage Class Memory Applications

Shuichiro Yasuda(Sony Semiconductor Solutions),  Kazuhiro Ohba(Sony Semiconductor Solutions),  Tetsuya Mizuguchi(Sony Semiconductor Solutions),  Hiroaki Sei(Sony Semiconductor Solutions),  Masayuki Shimuta(Sony Semiconductor Solutions),  Katsuhisa Aratani(Sony Semiconductor Solutions),  Tsunenori Shiimoto(Sony Semiconductor Solutions),  Tetsuya Yamamoto(Sony Semiconductor Solutions),  Takeyuki Sone(Sony Semiconductor Solutions),  Seiji Nonoguchi(Sony Semiconductor Solutions),  Jun Okuno(Sony Semiconductor Solutions),  Akira Kouchiyama(Sony Semiconductor Solutions),  Wataru Otsuka(Sony Semiconductor Solutions),  Keiichi Tsutsui(Sony Semiconductor Solutions),  

[Date]2017-07-31
[Paper #]SDM2017-34,ICD2017-22
A 65 nm 1.0V 1.84ns Silicon-on-Thin-Box (SOTB) Embedded SRAM with 13.72 nW/Mbit Standby Power for Smart IoT

Makoto Yabuuchi(Renesas),  Koji Nii(Renesas),  Shinji Tanaka(Renesas),  Shinozaki Yoshihiro(Nippon Systemware),  Yoshiki Yamamoto(Renesas),  Takumi Hasegawa(Renesas),  Hiroki Shinkawata(Renesas),  Shiro Kamohara(Renesas),  

[Date]2017-07-31
[Paper #]SDM2017-33,ICD2017-21
[Invited Talk] Emerging Computing Technology by Algorithm and Hardware Co-design

Shinya Takamaeda(Hokkaido Univ.),  

[Date]2017-07-31
[Paper #]SDM2017-31,ICD2017-19
TCAD Simulation of C-TFET Circuit with Drain Offset Structure

Hidehiro Asai(AIST),  Takahiro Mori(AIST),  Junich Hattori(AIST),  Koichi Fukuda(AIST),  Kazuhiko Endo(AIST),  Takashi Matsukawa(AIST),  

[Date]2017-07-31
[Paper #]SDM2017-35,ICD2017-23
Multi Sensor Operation using Octagonal Multi-Output MOSFET

Tomochika Harada(Yamagata Univ.),  

[Date]2017-07-31
[Paper #]SDM2017-32,ICD2017-20
[Invited Lecture] A 3.2ppm/℃ Second-Order Temperature Compensated CMOS On-Chip Oscillator Using Voltage Ratio Adjusting Technique

Guoqiang Zhang(Renesas Electronics),  Kosuke Yayama(Renesas Electronics),  Akio Katsushima(Renesas Electronics),  Takahiro Miki(Renesas Electronics),  

[Date]2017-08-01
[Paper #]SDM2017-39,ICD2017-27
Super-Sampling DAC α=-2 + √3

Yoshinao Kobayashi(Univ. of Tokyo),  Nobutsugu Higo(SLDJ),  

[Date]2017-08-01
[Paper #]SDM2017-40,ICD2017-28
Evaluation of equivalent MOSFET reduced temperature dependence of threshold voltage

Takuya Yamaguchi(Meiji Univ.),  Tatsuya Oku(Meiji Univ.),  Kawori Sekine(Meiji Univ.),  

[Date]2017-08-01
[Paper #]SDM2017-41,ICD2017-29
[Invited Talk] A Nonvolatile SRAM Integrated with Ferroelectric HfO2 Capacitor for Normally-Off Operation

Masaharu Kobayashi(Univ. of Tokyo),  Nozomu Ueyama(Univ. of Tokyo),  Toshiro Hiramoto(Univ. of Tokyo),  

[Date]2017-08-01
[Paper #]SDM2017-37,ICD2017-25
Parallel Programming of Non-volatile Power-up States of SRAM

Tomoko Mizutani(Univ. of Tokyo),  Kiyoshi Takeuchi(Univ. of Tokyo),  Takuya Saraya(Univ. of Tokyo),  Hirofumi Shinohara(Waseda Univ.),  Masaharu Kobayashi(Univ. of Tokyo),  Toshiro Hiramoto(Univ. of Tokyo),  

[Date]2017-08-01
[Paper #]SDM2017-38,ICD2017-26
[Invited Talk] Capacitor-less neuron circuits using metal-insulator transition devices

Takeaki Yajima(Univ. of Tokyo),  Tomonori Nishimura(Univ. of Tokyo),  Akira Toriumi(Univ. of Tokyo),  

[Date]2017-08-02
[Paper #]SDM2017-44,ICD2017-32
Multi-carrier Transmission Characteristics of All-Digital Low-IF Transmitter Using Weber-Type Image Suppression Method

Takumi Kamo(Tokyo Univ. of Science),  Yohtaro Umeda(Tokyo Univ. of Science),  Yusuke Kozawa(Ibaraki Univ.),  

[Date]2017-08-02
[Paper #]SDM2017-47,ICD2017-35
A Quadrature-modulation EPWM Transmitter with Parallel-Output MASH Delta-Sigma Modulator

Takumi Yamamoto(Tokyo Univ. of Science),  Yohtaro Umeda(Tokyo Univ. of Science),  Yusuke Kozawa(Ibaraki Univ.),  

[Date]2017-08-02
[Paper #]SDM2017-48,ICD2017-36
[Invited Talk] A 0.7V 12b 160MS/s 12.8fJ/conv. Calibration-free Pipelined-SAR ADC in 28nm CMOS with Digital Amplifier Technique

Kentaro Yoshioka(Toshiba),  Tomohiko Sugimoto(Toshiba),  Naoya Waki(Toshiba),  Sinnyoung Kim(Toshiba),  Daisuke Kurose(Toshiba),  Hirotomo Ishii(Toshiba),  Masanori Fururta(Toshiba),  Akihide Sai(Toshiba),  Tetsuro Itakura(Toshiba),  

[Date]2017-08-02
[Paper #]SDM2017-46,ICD2017-34
Gate Controlled Diode Characteristics of Super Steep Subthreshold slope PN-Body Tied SOI-FET for high Efficiency RF Energy Harvesting

Shun Momose(KIT),  Jiro Ida(KIT),  Takayuki Mori(KIT),  Takahiro Yoshida(KIT),  Junpei Iwata(KIT),  Takashi Horii(KIT),  Takahiro Furuta(KIT),  Takuya Yamada(KIT),  Daichi Takamatsu(KIT),  Kenji Itoh(KIT),  Koichiro Ishibashi(UEC),  Yasuo Arai(KEK),  

[Date]2017-08-02
[Paper #]SDM2017-45,ICD2017-33
［依頼講演］BRein Memory:バイナリ・インメモリ再構成型深層ニューラルネットワークアクセラレータ

Kota Ando(Hokkaido Univ.),  Kodai Ueyoshi(Hokkaido Univ.),  Kentaro Orimo(Hokkaido Univ.),  Haruyoshi Yonekawa(Tokyo Inst. of Tech.),  Shinpei Sato(Tokyo Inst. of Tech.),  Hiroki Nakahara(Tokyo Inst. of Tech.),  Masayuki Ikebe(Hokkaido Univ.),  Tetsuya Asai(Hokkaido Univ.),  Shinya Takamaeda(Hokkaido Univ.),  Tadahiro Kuroda(Keio Univ.),  Masato Motomura(Hokkaido Univ.),  

[Date]2017-08-02
[Paper #]SDM2017-43,ICD2017-31
[Invited Talk] SAR A/D Converter Using Stochastic Conversion and Machine-Learning Error Correction

Toshimasa Matsuoka(Osaka Univ.),  Takatsugu Kamata(SPChange),  Masayuki Ueda(SPChange),  Yusaku Hirai(Osaka Univ.),  Sadahiro Tani(Osaka Univ.),  Tomohiro Asano(Osaka Univ.),  Shodai Isami(Osaka Univ.),  Toshifumi Kurata(Osaka Univ.),  Keiji Tatsumi(Osaka Univ.),  

[Date]2017-08-02
[Paper #]SDM2017-42,ICD2017-30
Energy Efficient Wireless Power Transfer System with Open Loop Dynamic Transmitter Voltage Scaling Control

Toru Kawajiri(Keio Univ.),  Hiroki Ishikuro(Keio Univ.),  

[Date]2017-08-02
[Paper #]SDM2017-49,ICD2017-37