Electronics-Integrated Circuits and Devices(Date:2010/12/09)

Presentation
表紙

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[Date]2010/12/9
[Paper #]
目次

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[Date]2010/12/9
[Paper #]
Elimination of Half Select Disturb in 8T-SRAM by Local Injected Electron Asymmetric Pass Gate Transistor

Kentaro Honda,  Kousuke Miyaji,  Shuhei Tanakamaru,  Shinji Miyano,  Ken Takeuchi,  

[Date]2010/12/9
[Paper #]ICD2010-95
How to Write ISSCC Paper at Keio Kuroda Laboratory(Invited Paper)

Noriyuki Miura,  

[Date]2010/12/9
[Paper #]ICD2010-96
Ambient Electronics and Integrated Circuits(Invited talk)

Takayasu Sakurai,  

[Date]2010/12/9
[Paper #]ICD2010-97
Measurement and Characteristics Validation of On-chip Signal and Power Noise : Looking back on my doctral course (Invited talk)

Yasuhiro OGASAHARA,  

[Date]2010/12/9
[Paper #]ICD2010-98
High Error Rate Compensation Architecture and ECC for SSDs with NV-RAM and NAND Flash

Kazuhide HIGUCHI,  Mayumi FUKUDA,  Shuhei TANAKAMARU,  Ken TAKEUCHI,  

[Date]2010/12/9
[Paper #]ICD2010-99
CMOS-Based Nonvolatile Flip-Flop Design and its Application to a Fractional-N PLL Frequency Synthesizer

Ge WANG,  Jungyu LEE,  Shoichi MASUI,  

[Date]2010/12/9
[Paper #]ICD2010-100
IF filter research for next generation wireless transceiver

Ben Patrick,  Takayuki Konishi,  Toru Kashimura,  Shoichi Masui,  

[Date]2010/12/9
[Paper #]ICD2010-101
Chip Development of a Ubiquitous Processor

Harunobu UCHIUMI,  Takumi ISHIHARA,  Naomichi MIMURA,  Kazuki NARITA,  Tatsuya TAKAKI,  Masa-aki FUKASE,  Tomoaki SATO,  

[Date]2010/12/9
[Paper #]ICD2010-102
A 0.5V Subthreshold CMOS Analog Amplifier with Sub-MHz Bandwidth

Takashi MORI,  Tomochika HARADA,  Koichi MATSUSHITA,  Sumio OKUYAMA,  

[Date]2010/12/9
[Paper #]ICD2010-103
A 65nm CMOS High-Speed and High-Fidelity NBTI Recovery Sensor

Takashi MATSUMOTO,  Hiroaki MAKINO,  Kazutoshi KOBAYASHI,  Hidetoshi ONODERA,  

[Date]2010/12/9
[Paper #]ICD2010-104
Study on CMOS R-2R Ladder for Linearity Optimization by Adjust Channel Width

Yuta KATO,  Cong-Kha PRAM,  

[Date]2010/12/9
[Paper #]ICD2010-105
A Charge Sampling Filter with Second Order Sinc for SDR Receiver

Kenji Minefuji,  Takashi Matsumoto,  

[Date]2010/12/9
[Paper #]ICD2010-106
A Study of Pull-in Lock Simulation in CDR-PLL

Yasuyuki SHIMIZU,  Tsutomu YOSHIMURA,  Shuhei IWADE,  Hiroshi MAKINO,  Yoshio MATSUDA,  

[Date]2010/12/9
[Paper #]ICD2010-107
Comparison and Analysis of the Noise Sensitivity between LC-tank and Ring-type VCO

Ken Maruhashi,  Tsutomu Yoshimura,  Syuhei Iwade,  Hiroshi Makino,  Yoshio Matsuda,  

[Date]2010/12/9
[Paper #]ICD2010-108
Evaluation of Power Gating Structures Focusing on Power Supply Noise with Measurement and Simulation

Yasumichi TAKAI,  Masanori HASHIMOTO,  Takao ONOYE,  

[Date]2010/12/9
[Paper #]ICD2010-109
A 0.5V 6-bit Scalable Phase Interpolator

Satoshi Kumaki,  Abul Hasan Johari,  Takeshi Matsubara,  Isamu Hayashi,  Hiroki Ishikuro,  

[Date]2010/12/9
[Paper #]ICD2010-110
Design of Triple-band GPS Receiver

Ikkyun Jo,  Toshimasa Matsuoka,  Kenji Taniguchi,  Takuji Ebinuma,  

[Date]2010/12/9
[Paper #]ICD2010-111
Evaluation of power noise in SRAM core

Taku Toshikawa,  Tsubasa Masui,  Takuya Sawada,  Makoto Nagata,  

[Date]2010/12/9
[Paper #]ICD2010-112
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