Electronics-Integrated Circuits and Devices(Date:2009/11/25)

Presentation
表紙

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[Date]2009/11/25
[Paper #]
目次

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[Date]2009/11/25
[Paper #]
A Circuit Design Method based on Foreknown Regularity between I/O

Jin SATO,  Tsugio NAKAMURA,  Hiroshi KASAHARA,  Narito FUYUTSUME,  

[Date]2009/11/25
[Paper #]CPM2009-134,ICD2009-63
Implementation of Asynchronous Bus for GALS System

Takehiro HORI,  Tsugio NAKAMURA,  Narito FUYUTSUME,  Hiroshi KASAHARA,  Teruo TANAKA,  

[Date]2009/11/25
[Paper #]CPM2009-135,ICD2009-64
A WiMAX Turbo Decoder with Tailbiting BIP Architecture

Hiroaki ARAI,  Naoto MIYAMOTO,  Koji KOTANI,  Hisanori FUJISAWA,  Takashi ITO,  

[Date]2009/11/25
[Paper #]CPM2009-136,ICD2009-65
A Reference CMOS Circuit Structure for Evaluation of Power Supply Noise

Tetsuro MATSUNO,  Daisuke KOSAKA,  Makoto NAGATA,  

[Date]2009/11/25
[Paper #]CPM2009-137,ICD2009-66
PI/SI/EMI for Chip/Package/Board Co-Design

Hideki ASAI,  

[Date]2009/11/25
[Paper #]CPM2009-138,ICD2009-67
Failures due to Terrestrial Neutrons in Most Advanced Semiconductor Devices : Impacts and Hardening Techniques down to 22nm Design Rule

Eishi Ibe,  Ken-ichi Shimbo,  Hitoshi Taniguchi,  Tadanobu Toba,  

[Date]2009/11/25
[Paper #]CPM2009-139,ICD2009-68
Noise characteristic improvement of an LSI by using an interposer with embedding capacitors

Yoshiyuki SAITO,  Eiji TAKAHASHI,  Chie SASAKI,  Yasuhiro SUGAYA,  

[Date]2009/11/25
[Paper #]CPM2009-140,ICD2009-69
EMC Jisso Design at GHz frequencies

Takashi HARADA,  Naoki KOBAYASHI,  Ken MORISHITA,  Hisashi ISHIDA,  

[Date]2009/11/25
[Paper #]CPM2009-141,ICD2009-70
EMC Circuit Design and Jisso Design for System LSI : Proposal for Circuit Design Managing EMC and Jisso Issue from Jisso-side

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[Date]2009/11/25
[Paper #]CPM2009-142,ICD2009-71
Correlation of Mitigation of Soft-error Rate of Routers between Neutron Irradiation Test and Field Soft-error Data

Kenichi SHIMBO,  Tadanobu TOBA,  Hidefumi IBE,  Koji NISHII,  

[Date]2009/11/25
[Paper #]CPM2009-143,ICD2009-72
A Target Impedance of Power Distribution Network and LSI Packaging Design

Narimasa TAKAHASHI,  Yoshiyuki KOSAKA,  Masatoshi ISHII,  Makoto SHIROSHITA,  

[Date]2009/11/25
[Paper #]CPM2009-144,ICD2009-73
Evaluation of Waveform-Improvement performance on the Segmental Transmission Line

Yuki SHIMAUCHI,  Hiroshi NAKAYAMA,  Yoshiki YAMAGUCHI,  Noriyuki AIBE,  Ikuo YOSHIHARA,  Moritoshi YASUNAGA,  

[Date]2009/11/25
[Paper #]CPM2009-145,ICD2009-74
Study on the Signal Integrity Design of a High-Speed LSI and a Printed Circuit Board

Seiichi SAITO,  Keitaro YAMAGISHI,  

[Date]2009/11/25
[Paper #]CPM2009-146,ICD2009-75
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[Date]2009/11/25
[Paper #]
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[Date]2009/11/25
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