Electronics-Integrated Circuits and Devices(Date:2006/10/19)

Presentation
表紙

,  

[Date]2006/10/19
[Paper #]
目次

,  

[Date]2006/10/19
[Paper #]
A Cryptographic Communication Technique between IP Cores in ULSI

Masafumi HAYAKAWA,  Tsugio NAKAMURA,  Hiroshi KASAHARA,  Narito FUYUTSUME,  Teruo TANAKA,  

[Date]2006/10/19
[Paper #]SIP2006-83,ICD2006-109,IE2006-61
A multi DSP generation system with fractal structured architecture from C language

Masanori NISHIZAWA,  Yuichi SHIRAI,  Yoshizo OSUMI,  Hideto NISHIKADO,  Toshiyuki KATO,  Hironori YAMAUCHI,  Shiro KOBAYASHI,  

[Date]2006/10/19
[Paper #]SIP2006-84,ICD2006-110,IE2006-62
Combine operation pattern extraction from CDFG for DSP generation

Yuichi Shirai,  Masanori Nishizawa,  Yoshizo Osumi,  Hieto Nishikado,  Toshiyuki Kato,  Hironori Yamauchi,  Shiro Kobayashi,  

[Date]2006/10/19
[Paper #]SIP2006-85,ICD2006-111,IE2006-63
Design of Embedded System for Micro-Capsule-Robot

Tsutomu Nishimura,  Masatsugu Kobayashi,  Takehiro Yoshida,  Manabu Takeishi,  Tomonori Izumi,  Toshiyuki Kato,  Hironori Yamauchi,  

[Date]2006/10/19
[Paper #]SIP2006-86,ICD2006-112,IE2006-64
Construction and Design of the Communication Module for Micro-Capsule-Robots

Kenichi WATANABE,  Fumiya NAKAMURA,  Minoru SAITO,  Takafumi KADO,  Notsugu YAMAMURA,  Tomonori IZUMI,  Hironori YAMAUCHI,  

[Date]2006/10/19
[Paper #]SIP2006-87,ICD2006-113,IE2006-65
Application for Back-End Design of a Highly Collision-Resistive RFID System through High-Level Modeling Approach

Yohei FUKUMIZU,  Makoto NAGATA,  Kazuo TAKI,  

[Date]2006/10/19
[Paper #]SIP2006-88,ICD2006-114,IE2006-66
A 1V Low Flicker Noise CMOS Filter

Haruo YAMAKOSHI,  Hiroshi YAMAZAKI,  Kenji TANIGUCHI,  

[Date]2006/10/19
[Paper #]SIP2006-89,ICD2006-115,IE2006-67
Super Parallel SIMD Processor with CAM based High-Speed Pattern Matching Capability

Yutaka KONO,  Takeshi KUMAKI,  Masakatsu ISHIZAKI,  Masaharu TAGAMI,  Tetsushi KOIDE,  Hans Jurgen MATTAUSCH,  Takayuki GYOHTEN,  Hideyuki NODA,  Yasuto KURODA,  Katsumi DOSAKA,  Kazutami ARIMOTO,  Kazunori SAITO,  

[Date]2006/10/19
[Paper #]SIP2006-90,ICD2006-116,IE2006-68
Reducing the Circuit Size of Multipliers

Jiunn Jong Edwin TAN,  Ryusuke EGAWA,  Jubei TADA,  Ken-ichi SUZUKI,  Gensuke GOTO,  Tadao NAKAMURA,  

[Date]2006/10/19
[Paper #]SIP2006-91,ICD2006-117,IE2006-69
Science and Technology of Everyday Life System : Sensing and Modeling of Everyday Behavior for Children's Injury Prevention

Yoshifumi NISHIDA,  Yoichi MOTOMURA,  

[Date]2006/10/19
[Paper #]SIP2006-92,ICD2006-118,IE2006-70
Media Processing LSI Architectures for Automotives : Challenges and Future Trends

Ichiro Kuroda,  

[Date]2006/10/19
[Paper #]SIP2006-93,ICD2006-119,IE2006-71
An Efficient Lane Recognition Algorithm for Automobile Applications

Takeshi TAOKA,  Makoto MANABE,  Manabu KANBAYASHI,  Yosuke OHNISHI,  Masahiro FUKUI,  

[Date]2006/10/19
[Paper #]SIP2006-94,ICD2006-120,IE2006-72
C-based Design and its Optimization for a Speech Recognition System

Makoto SAITSUJI,  Takashi KAMBE,  

[Date]2006/10/19
[Paper #]SIP2006-95,ICD2006-121,IE2006-73
画像符号化SoCの低消費電力化のための垂直統合設計研究(システムLSIの応用と要素技術,専用プロセッサ,プロセッサ,DSP,画像処理技術,及び一般)

,  

[Date]2006/10/19
[Paper #]SIP2006-96,ICD2006-122,IE2006-74
An LSI Power Modeling and Optimization Scheme in Battery Operated Systems

Hiroyoshi HIRAI,  Tatsuya KOYAGI,  Yuichiro TACHIKAWA,  Masahiro FUKUI,  

[Date]2006/10/19
[Paper #]SIP2006-97,ICD2006-123,IE2006-75
A Self-support Oriented IP Core Design Method

Hiroyuki HATAKENAKA,  Tsugio NAKAMURA,  Hiroshi KASAHARA,  Narito FUYUTSUME,  Teruo TANAKA,  

[Date]2006/10/19
[Paper #]SIP2006-98,ICD2006-124,IE2006-76
An Analysis on a Tradeoff between Reliability and Performance and a Reliable Cache Architecture for Computer Systems

Makoto SUGIHARA,  Tohru ISHIHARA,  Kazuaki MURAKAMI,  

[Date]2006/10/19
[Paper #]SIP2006-99,ICD2006-125,IE2006-77
C-based Design and its Optimization for a Reed-Solomon Decoder

Yoshikazu ODAJIMA,  Tetsuya KONISHI,  Takashi KAMBE,  

[Date]2006/10/19
[Paper #]SIP2006-100,ICD2006-126,IE2006-78
12>> 1-20hit(23hit)