Electronics-Integrated Circuits and Devices(Date:2005/05/20)

Presentation
表紙

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[Date]2005/5/20
[Paper #]
目次

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[Date]2005/5/20
[Paper #]
A 10-Gb/s Burst-Mode CDR IC in 0.13-μm CMOS

Masafumi NOGAWA,  Kazuyoshi NISHIMURA,  Shunji KIMURA,  Tomoaki YOSHIDA,  Tomoaki KAWAMURA,  Minoru TOGASHI,  Kiyomi KUMOZAKI,  Yusuke OHTOMO,  

[Date]2005/5/20
[Paper #]ICD2005-28
1.25Gb/s Burst-Mode Receiver ICs with Quick Response for PON Systems

Makoto NAKAMURA,  Yuhki IMAI,  Yohtaro UMEDA,  Jun ENDO,  Yuji AKATSU,  

[Date]2005/5/20
[Paper #]ICD2005-29
12Gb/s duobinary signaling with x2 oversampled edge equalization

Kouichi Yamguchi,  Kazuhisa Sunaga,  Syunichi Kaeriyama,  Takaaki Nedachi,  Makoto Takamiya,  Kouichi Nose,  Yoshihiro Nakagawa,  Mitsutoshi Sugawara,  Muneo Fukaishi,  

[Date]2005/5/20
[Paper #]ICD2005-30
A 950MHz Rectifier Circuit for Sensor Networks with 10m Distance

Toshiyuki Umeda,  Hiroshi Yoshida,  Shuichi Sekine,  Yumi Fujita,  Takuji Suzuki,  Shoji Otaka,  

[Date]2005/5/20
[Paper #]ICD2005-31
A Single-Chip Si-LDMOS Power Amplifier for GSM

Toshihiko SHIMIZU,  Yoshikuni MATSUNAGA,  Satoshi SAKURAI,  Isao YOSHIDA,  Masao HOTTA,  

[Date]2005/5/20
[Paper #]ICD2005-32
Integrated Stereo Delta-Sigma Class D Amplifier

Eric Gaalaas,  Bill Yang Liu,  Naoaki Nishimura,  

[Date]2005/5/20
[Paper #]ICD2005-33
0.18μm 102dB-SNR Mixed CT SC Audio-Band ΔΣADC

Paul Morrow,  Maria Chamarro,  Colin Lyden,  Pablo Ventura,  Andrew Abo,  Atsushi Matamura,  Michael Keane,  Richard O'Brien,  Paschal Minogue,  Johan Mansson,  Niall McGuinness,  Martin McGranaghan,  Ivan Ryan,  

[Date]2005/5/20
[Paper #]ICD2005-34
Spread-Spectrum Clock Generator for Serial ATA using Fractional PLL controlled by Delta-Sigma Modulator with Level Shifter

Takashi KAWAMOTO,  Masaru KOKUBO,  Takashi OSHIMA,  Takayuki NOTO,  Masato SUZUKI,  Shigeyuki SUZUKI,  Takashi HAYASAKA,  Tomoaki TAKAHASHI,  Jun KASAI,  

[Date]2005/5/20
[Paper #]ICD2005-35
A 195Gb/s 1.2W 3D-Stacked Inductive Inter-Chip Wireless Superconnect with Transmit Power Control Scheme

Noriyuki MIURA,  Daisuke MIZOGUCHI,  Mari INOUE,  Takayasu SAKURAI,  Tadahiro KURODA,  

[Date]2005/5/20
[Paper #]ICD2005-36
A 3D Integration Scheme utilizing Wireless Interconnections for Implementing Hyper Brains

Atsushi Iwata,  Mamoru Sasaki,  Takamaro Kikkawa,  Seiji Kameda,  Hiroshi Ando,  Kentaro Kimoto,  Daisuke Arizono,  Hideo Sunami,  

[Date]2005/5/20
[Paper #]ICD2005-37
A Programmable On-Chip Timing Jitter Measurement Circuit without Reference Clock

Kiyotaka ICHIYAMA,  Masahiro ISHIDA,  Takahiro YAMAGUCHI,  Mani SOMA,  Masakatsu SUDA,  Toshiyuki OKAYASU,  Daisuke WATANABE,  Kazuhiro YAMAMOTO,  

[Date]2005/5/20
[Paper #]ICD2005-38
Substrate Integrity beyond 1GHz

Mitsuya FUKAZAWA,  Makoto NAGATA,  Naoyuki HAMANISHI,  Masazumi SHIOCHI,  Tetsuya IIDA,  Junichiro WATANABE,  Yoshitaka MURASAKA,  Atsushi IWATA,  

[Date]2005/5/20
[Paper #]ICD2005-39
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[Date]2005/5/20
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[Date]2005/5/20
[Paper #]
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[Date]2005/5/20
[Paper #]