Electronics-Integrated Circuits and Devices(Date:2005/04/07)

Presentation
表紙

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[Date]2005/4/7
[Paper #]
目次

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[Date]2005/4/7
[Paper #]
A Read-Static-Noise-Margin-Free SRAM cell for Low-Vdd and High-speed Applications

Koichi TAKEDA,  Yasuhiko HAGIHARA,  Yoshiharu AIMOTO,  Masahiro NOMURA,  Yoetsu NAKAZAWA,  Toshio ISHII,  Hiroyuki KOBATAKE,  

[Date]2005/4/7
[Paper #]ICD2005-1
Low-Power Embedded SRAM Modules with Expanded Margins for Writing

Masanao YAMAOKA,  Noriaki MAEDA,  Yoshihiro SHINOZAKI,  Yasuhisa SHIMAZAKI,  Kei KATO,  Shigeru SHIMADA,  Kazumasa YANAGISAWA,  Takayuki KAWAHARA,  

[Date]2005/4/7
[Paper #]ICD2005-2
A 256Mb Synchronous Burst DDR SRAM using Single-crystal Silicon Thin Film Transistor (SSTFT) SRAM cell

Youngho Suh,  Hyouyoun Nam,  Youngdae Lee,  Hungjun An,  Sangbeom Kang,  Byunggil Choi,  Hoon Lim,  choongkeun Kwak,  Hyungeun Byun,  

[Date]2005/4/7
[Paper #]ICD2005-3
DRAM in the Nanoscale-era : Non-1T1C Approaches

Tomoyuki ISHII,  

[Date]2005/4/7
[Paper #]ICD2005-4
A 128Mb DRAM Using a 1T Gain Cell(FBC) on SOI

Takashi Ohsawa,  Katsuyuki Fujita,  Kosuke Hatsuda,  Tomoki Higashi,  Mutsuo Morikado,  Yoshihiro Minami,  Tomoaki Shino,  Hiroomi Nakajima,  Kazumi Inoh,  Takeshi Hamamoto,  Shigeyoshi Watanabe,  

[Date]2005/4/7
[Paper #]ICD2005-5
Current State and Future Direction of Embedded Memory in System on Chip (SoC) for Digital Consumer Electronics : Challenge to Structural Reform of SoC

Hiroyuki Yamauchi,  

[Date]2005/4/7
[Paper #]ICD2005-6
A 196-mm^2, 2-Gb DDR2 SDRAM using an 80-nm Triple Metal Technology

Jeonghoon KOOK,  Kyehyun KYUNG,  Chiwook KIM,  Jaeyoung LEE,  

[Date]2005/4/7
[Paper #]ICD2005-7
Statistical Integration in Multigigabit DRAM Design

Tomonori Sekiguchi,  Satoru Akiyama,  Kazuhiko Kajigaya,  Satoru Hanzawa,  Riichiro Takemura,  Takayuki Kawahara,  

[Date]2005/4/7
[Paper #]ICD2005-8
Improved write methods for 64Mb Phase-change Random Access Memory (PRAM)

Hyung-rok Oh,  Beak-hyung Cho,  Woo Yeong Cho,  Sangbeom Kang,  Byung-gil Choi,  Hye-jin Kim,  Ki-sung Kim,  Du-eung Kim,  Choong-keun Kwak,  Hyun-geun Byun,  Gi-tae Jeong,  Hong-sik Jeong,  Kinam Kim,  

[Date]2005/4/7
[Paper #]ICD2005-9
Design of 8Gb NAND Flash Memory with 70nm CMOS Technology

Takumi ABE,  Takahiko HARA,  Koichi FUKUDA,  Kazuhisa KANAZAWA,  Noboru SHIBATA,  Koji HOSONO,  Hiroshi MAEJIMA,  Michio NAKAGAWA,  Masatsugu KOJIMA,  Masaki FUJIU,  Yoshiaki TAKEUCHI,  Kazumi AMEMIYA,  Midori MOROOKA,  Teruhiko KAMEI,  Hiroaki NASU,  Chi-Ming Wang,  Kiyofumi SAKURAI,  Naoya TOKIWA,  Hiroko WAKI,  

[Date]2005/4/7
[Paper #]ICD2005-10
4Gb Multilevel AG-AND Flash Memory with 10MB/s Programming Throughput

Hideaki Kurata,  Yoshitaka Sasago,  Kazuo Otsuga,  Tsuyoshi Arigane,  Tetsufumi Kawamura,  Takashi Kobayashi,  Hitoshi Kume,  Kazuki Homma,  Kenji Kozakai,  Satoshi Noda,  Teruhiko Ito,  Masahiro Shimizu,  Yoshihiro Ikeda,  Osamu Tsuchiya,  Kazunori Furusawa,  

[Date]2005/4/7
[Paper #]ICD2005-11
ディジタルコンシューマ時代に向けたメモリ技術(新メモリ技術, メモリ応用技術, 一般, ISSCC特集3 不揮発性メモリ)

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[Date]2005/4/7
[Paper #]ICD2005-12
複写される方へ

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[Date]2005/4/7
[Paper #]
Notice about photocopying

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[Date]2005/4/7
[Paper #]
奥付

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[Date]2005/4/7
[Paper #]