Electronics-Integrated Circuits and Devices(Date:2003/09/05)

Presentation
表紙

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[Date]2003/9/5
[Paper #]
目次

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[Date]2003/9/5
[Paper #]
Small Area D/A Converter Using Weighted Mean Sample-and-Hold Circuits

Masayuki UNO,  Shoji KAWAHITO,  

[Date]2003/9/5
[Paper #]ICD2003-93
A study of a voltage reference circuit by using weakly inverted CMOS transistors

Akinori KABAYA,  Yasuhiro SUGIMOTO,  

[Date]2003/9/5
[Paper #]ICD2003-94
CMOS Voltage Reference based on Gate Work Function Differences in Poly-Si controlled by Conductivity Type and Impurity Concentration

H. Watanabe,  S. Ando,  H. Aota,  M. Dainin,  Y. J. Chun,  K. Taniguchi,  

[Date]2003/9/5
[Paper #]ICD2003-95
Design of a Skew Correctable Master-Slave Delay Locked Loop

Atsushi SUZUKI,  Shoji KAWAHITO,  Daisuke MIYAZAKI,  Masanori FURUTA,  

[Date]2003/9/5
[Paper #]ICD2003-96
A Design of a Compact 2GHz-PLL with New Adaptive Active Loop Filter Circuit

Shiro Dosho,  Masaomi Toyama,  Naoshi Yanagisawa,  

[Date]2003/9/5
[Paper #]ICD2003-97
A Performance Prediction of Clock Generation PLLs in Digital CMOS Processes. : The Efficacy of LC oscillator based PLLs

Takahito MIYAZAKI,  Hidetoshi HASHIMOTO,  Hidetoshi ONODERA,  

[Date]2003/9/5
[Paper #]ICD2003-9
The bottleneck in the design of low-voltage and low-power, RF and mixed analog and digital circuits

Yasuhiro SUGIMOTO,  

[Date]2003/9/5
[Paper #]ICD2003-99
A Study on a GPS Dual-band Image-reject Mixer

Masaki HARUOKA,  Yoshihiro UTSUROGI,  Toshimasa MATSUOKA,  Kenji TANIGUCHI,  

[Date]2003/9/5
[Paper #]ICD2003-100
Estimation of Inductors Utilizing Thick Oxide Process

Jun KINO,  Minoru FUJISHIMA,  Kazuhiro TSURUTA,  

[Date]2003/9/5
[Paper #]ICD2003-101
Low Power circuits for wireless communication with thick oxide

Takayasu NORIMATSU,  Ken YAMAMOTO,  Minoru FUJISHIMA,  Kazuhiro TSURUTA,  

[Date]2003/9/5
[Paper #]ICD2003-102
1V-Operation 630MHz Frequency. Divider Circuits

Yasuko YAMAMOTO,  Toshimasa MATSUOKA,  Kenji TANIGUCHI,  

[Date]2003/9/5
[Paper #]ICD2003-103
A CMOS Predistorter Using a P+/N Junction Diode with a Bias Feed Resistor

Sungwoo CHA,  Toshimasa MATSUOKA,  Kenji TANIGUCHI,  

[Date]2003/9/5
[Paper #]ICD2003-105
Self-corrective Device and Architecture to Ensure LSI Operati on at 0.5 V Using Bulk Dynamic Threshold MOSFET with a Self-Adaptive Power Supply

Tomohisa OKUNO,  Seizo KAKIMOTO,  Yasuaki IWASE,  Yoshifumi YAOI,  Masayuki NAKANO,  Shinji TOYOYAMA,  Yuichi SATO,  Hiroshi KOTAKI,  Atsunori KITO,  

[Date]2003/9/5
[Paper #]ICD2003-105
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[Date]2003/9/5
[Paper #]
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[Date]2003/9/5
[Paper #]