Electronics-Integrated Circuits and Devices(Date:2002/09/20)

Presentation
表紙

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[Date]2002/9/20
[Paper #]
目次

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[Date]2002/9/20
[Paper #]
An Analog Integrated Circuit Based on Vertebrate Outer Retina with Superior Tolerance for the MOS Transistor Mismatch

Amal Bandula KARIYAWASAM,  Akira TAKASAKI,  Kimihiro NISHIO,  Hiroshi ABE,  Shinya SAWA,  Yuzo FURUKAWA,  Hiroo YONEZU,  

[Date]2002/9/20
[Paper #]ICD2002-94
An Analog Network Based on Retinal Vision Processing

Hiroshi ABE,  Kimihiro NISHIO,  Akira TAKASAKI,  Amal Bandula KARIYAWASAM,  Shinya SAWA,  Yuzo FURUKAWA,  Hiroo YONEZU,  

[Date]2002/9/20
[Paper #]ICD2002-95
Analog MOS network for temporal and spatial contrast detection based on invertebrate vision systems

Masahiro OHTANI,  Hiroo YONEZU,  

[Date]2002/9/20
[Paper #]ICD2002-96
The application of a silicon retina to target tracking

Keisuke INOUE,  Kazuhiro SHIMONOMURA,  Seiji KAMEDA,  Tetsuya YAGI,  

[Date]2002/9/20
[Paper #]ICD2002-97
A CMOS PLL Clock Generator Using a Source-Voltage Controlled Oscillator (S-VCO)

Tomochika HARADA,  Tadayoshi ENOMOTO,  

[Date]2002/9/20
[Paper #]ICD2002-98
A Calibration Method for High-Frequency PLL Synthesizer

Yoshiyuki SHIBAHARA,  Masaru KOKUBO,  

[Date]2002/9/20
[Paper #]ICD2002-99
Design Optimization of Low Phase Noise and Wide Frequency Range VCOs

Tomoaki MAEDA,  Atsushi IWATA,  

[Date]2002/9/20
[Paper #]ICD2002-100
2-GHz-B and Highly Accurate On-chip Polyphase filters

Kenji SUZUKI,  Mamoru UGAJIN,  Junichi KODATE,  Tsuneo TSUKAHARA,  

[Date]2002/9/20
[Paper #]ICD2002-101
A 0.13μm CMOS 5-Gb/s 10-meter 28AWG cable transceiver with no-feedback-loop continuous-time post-equalizer

Yoshiharu KUDOH,  Muneo FUKAISHI,  Masayuki MIZUNO,  

[Date]2002/9/20
[Paper #]ICD2002-102
Implementation of Soft Decision Viterbi Decoder taking account of Channel Distortion

Yoshitomo KANEDA,  Tomohisa WADA,  Shuji MURAKAMI,  Kunio MORIMOTO,  Michiru HORI,  

[Date]2002/9/20
[Paper #]ICD2002-103
RF-IC System for W-CDMA : Evaluation of Prototype for W-CDMA Mobile Terminal

Yukinori AKAMINE,  Hirotake ISHII,  Satoshi TANAKA,  Kazuaki HORI,  Akio YAMAMOTO,  

[Date]2002/9/20
[Paper #]ICD2002-104
A Binocular CMOS Range Image Sensor with Bit-Serial Block-Parallel Interface Using Cyclic Pipelined ADC'S

Taichiro KATO,  Shoji KAWAHITO,  Koji KOBAYASHI,  Hirosi SASAKI,  Tatsuya EKI,  Tetuo HISANAGA,  

[Date]2002/9/20
[Paper #]ICD2002-105
Design of new smart image sensor which has two focal planes for object tracking and depth estimation

Shoichi NAGAO,  Takayuki HAMAMOTO,  

[Date]2002/9/20
[Paper #]ICD2002-106
[OTHERS]

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[Date]2002/9/20
[Paper #]