Electronics-Integrated Circuits and Devices(Date:1997/06/20)

Presentation
表紙

,  

[Date]1997/6/20
[Paper #]
目次

,  

[Date]1997/6/20
[Paper #]
[CATALOG]

,  

[Date]1997/6/20
[Paper #]
A1-V Battery Operated 0.25-μm SRAM Macrocell for Portable Equipment

Nobutaro SHIBATA,  Hiroki MORIMURA,  

[Date]1997/6/20
[Paper #]ED97-52
290K-Gate, 1V, 100MHz ULSI using 0.25μm SIMOX/MTCMOS Technology

Yoshinori GOTOH,  Yasuyuki Tanabe,  Mayumi Watanabe,  Takahiro HATANO,  Yasuyuki MATSUYA,  Shin'ichiro Mutoh,  Masato MIZOGUCHI,  Masanobu SUZUKI,  

[Date]1997/6/20
[Paper #]ED97-53
Low-Voltage 0.35μm CMOS/SOI Technology for High-Performance ASIC's

T Naka,  A. O. Adan,  S Kaneko,  D. Urabe,  K. Higashi,  A. Kagisawa,  

[Date]1997/6/20
[Paper #]ED97-54
Active Body-Bias SOI-CMOS Driver Circuits

Yoshiki WADA,  Kimio UEDA,  Takanori Hirota,  Yuuichi HIRANO,  Koichiro MASHIKO,  Hisanori HAMANO,  

[Date]1997/6/20
[Paper #]ED97-55
A 0.5V 200MHz 32b ALU using a body bias controlled SOI pass-gate-logic

Shigeyoshi Watanabe,  Tuneaki Fuse,  Takashi Yamada,  Masahiko Kamoshida,  Masako Ohta,  Tomoaki Shino,  Shigeru Kawanaka,  Mamoru Terauchi,  Takeshi Yoshida,  Genso Matsubara,  Shinichi Yoshioka,  Yukihito Oowaki,  Makoto Yoshimi,  Kazunori /Manabe Sohei Ohuchi,  

[Date]1997/6/20
[Paper #]ED97-56
Multimedia Impact on Devices in the 21st Century

Masanobu Higashida,  

[Date]1997/6/20
[Paper #]ED97-57
A Wide-Dynamic-Range High-Transimpedance Si Bipolar Preamplifier IC for 10-Gb/s Optical Fiber Links

Toru Masuda,  Ken-ichi Ohhata,  Kazuo Imai,  Ryoji Takeyari,  Katsuyoshi Washio,  

[Date]1997/6/20
[Paper #]ED97-58
High-speed Low-power SDH Regenerator Section Terminating LSI

Keiichi KOIKE,  Kenji KAWAI,  Yuichiro TAKEI,  Akira ONOZAWA,  Hitoshi OBARA,  Haruhiko ICHINO,  

[Date]1997/6/20
[Paper #]ED97-59
GaAs 100K gates Gate Array with Digital Variable Delay Macro Cell using Meshed Air Bridge Structure

T. Heima,  A. Ohta,  N. Higashisaka,  T. Hisaka,  H. Nakano,  R. Ohmura,  N. Tanino,  

[Date]1997/6/20
[Paper #]ED97-60
A Flip Flop Using Common Gate FETs For High Speed LSIs

Hiroyuki Yamada,  Toshihiko Ichioka,  

[Date]1997/6/20
[Paper #]ED97-61
A low power GaAs front-end IC with current-reuse configuration.

H. Ishida,  H. Koizumi,  K. Miyatsuji,  T. Tanaka,  D. Ueda,  

[Date]1997/6/20
[Paper #]ED97-62
Performance of p-channel HJFET with Selectively Grown Contact Layers

Naoki FURUHATA,  Shuji ASAI,  Tadashi MAEDA,  Masahiro FUJII,  Yasuo OHNO,  

[Date]1997/6/20
[Paper #]ED97-63
Symmetric and Asymmetric InGaP/InGaAs/GaAs HMESFETs and Its Application to Millimeter-wave Amplifier

Kiyomitsu Onodera,  Kazumi Nishimura,  Takumi Nittono,  Yasuro Yamane,  Kimiyoshi Yamasaki,  

[Date]1997/6/20
[Paper #]ED97-64
[OTHERS]

,  

[Date]1997/6/20
[Paper #]