Electronics-Integrated Circuits and Devices(Date:1997/04/25)

Presentation
表紙

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[Date]1997/4/25
[Paper #]
目次

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[Date]1997/4/25
[Paper #]
Development of systolic array DSP for real-time video signal processing

Junichi Yano,  Jiro Miyake,  Miki Urano,  Genichiro Inoue,  Shintaro Tsubata,  Seiji Yamaguchi,  

[Date]1997/4/25
[Paper #]ICD97-7,CPSY97-7,FTS97-7
Shared vs. Snoop : Evaluation of Cache Structure for Single-chip Multiprocessors

T. Kisuki,  M. Wakabayashi,  J. Yamamoto,  K. Inoue,  H. Amano,  

[Date]1997/4/25
[Paper #]ICD97-8,CPSY97-8,FTS97-8
Massively Parallel Processor RICA-1 and its Basic Performance

Hiroshi MATSUOKA,  Kazuaki OKAMOTO,  Hideo HIRONO,  Takashi YOKOTA,  Shuichi SAKAI,  

[Date]1997/4/25
[Paper #]ICD97-9,CPSY97-9,FTS97-9
On-chip Memorypath Architectures for PPRAM-type LSIs

Koji INOUE,  Hiroshi MIYAJIMA,  Koji KAI,  Kazuaki MURAKAMI,  

[Date]1997/4/25
[Paper #]ICD97-10,CPSY97-10,FTS97-10
Multimedia Server SmartStreamer

Shigehiro Asano,  Tatsunori Kanai,  

[Date]1997/4/25
[Paper #]ICD97-11,CPSY97-11,FTS97-11
The Incorporation of Coupling Units into Fault-Tolerant Neural Networks with Feedback

Koichi Hosoi,  Shinichi Kawada,  Yoshihiro Tohma,  

[Date]1997/4/25
[Paper #]ICD97-12,CPSY97-12,FTS97-12
High Speed Method for Test Points Selection

Michinobu NAKAO,  Kazumi HATAYAMA,  Isao HIGASHI,  

[Date]1997/4/25
[Paper #]ICD97-13,CPSY97-13,FTS97-13
A Minimum Distance Search Circuit using Dual-Line PWM Signal Processing and Charge Packet Counting Techniques

Makoto Nagata,  Takahiro Yoneda,  Daisuke Nomasaki,  Makoto Sano,  Atsushi Iwata,  

[Date]1997/4/25
[Paper #]ICD97-14,CPSY97-14,FTS97-14
An implementation of Dataflow Compiler for Virtual hardware system WASMII

K. Higure,  H. Miyazaki,  Y. Shibata,  H. Amano,  

[Date]1997/4/25
[Paper #]ICD97-15,CPSY97-15,FTS97-15
[OTHERS]

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[Date]1997/4/25
[Paper #]