Electronics-Integrated Circuits and Devices(Date:1995/05/25)

Presentation
表紙

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[Date]1995/5/25
[Paper #]
目次

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[Date]1995/5/25
[Paper #]
A 1-Gb DRAM for File Applications

Tadahiko Sugibayashi,  Isao Naritake,  Satoshi Utsugi,  Kentaro Shibahara,  Ryuichi Oikawa,  Hidemitsu Mori,  Shouichi Iwao,  Tatsunori Murotani,  Kuniaki Koyama,  Shinichi Fukuzawa,  Toshiro Itani,  Kunihiko Kasama,  Takashi Okuda,  Shuichi Ohya,  Masaki Ogawa,  

[Date]1995/5/25
[Paper #]
Circuit Design Techniques for Low Voltage Operating And/Or Giga-Scale DRAMs

Takahiro Tsuruda,  Tadato Yamagata,  Shigeki Tomishima,  Masaki Tsukude,  Yasushi Hashizume,  Kazutami Arimoto,  

[Date]1995/5/25
[Paper #]
A 1.6GB/s Data-Transfer-Rate 8Mb Embedded DRAM

Masaharu Wada,  Katsuhiko Sato,  Tomoaki Yabe,  Ryo Haga,  Motohiro Enkaku,  Masahisa Ohgata,  Sinji Miyano,  Kenji Numata,  Hiroshi Shinya,  Tohru Furuyama,  

[Date]1995/5/25
[Paper #]
An NTL-CMOS SRAM Macro Using a CMOS Memory Cell with PMOS Access Transistors

Hitoshi Okamura,  Hideo Toyoshima,  Koichi Takeda,  Takashi Oguri,  Satoshi Nakamura,  Masahide Takada,  Kiyotaka Imai,  Yasushi Kinoshita,  Hiroshi Yoshida,  Toru Yamazaki,  

[Date]1995/5/25
[Paper #]
A 200-MHz Synchronous CMOS SRAM Macrocell

Hiroki Morimura,  Nobutaro Shibata,  

[Date]1995/5/25
[Paper #]
Current-mode Sense Amplifiers for Low-voltage Memories

Nobutaro Shibata,  

[Date]1995/5/25
[Paper #]
Low Power Circuit Technologies for GaAs DCFL SRAMs

Haruya Iwata,  Atsunori Hirobe,  Tadayoshi Enomoto,  

[Date]1995/5/25
[Paper #]
A 295MHz 4K word × 256 bit SRAM using 0.3V swing I/Os

Natsuki Kushiyama,  Charles Tan,  

[Date]1995/5/25
[Paper #]
[OTHERS]

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[Date]1995/5/25
[Paper #]