Electronics-Electron Devices(Date:2005/01/20)

Presentation
表紙

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[Date]2005/1/20
[Paper #]
目次

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[Date]2005/1/20
[Paper #]
Fabrication of wire transistor with self-aligned gate by selective area MOVPE

N. Ooike,  J. Motohisa,  T. Fukui,  

[Date]2005/1/20
[Paper #]ED2004-227,SDM2004-222
Negative Differential Resistance of CoSi_2/CaF_2 Triple Barrier Resonant Tunneling Diode Grown by Local Epitaxy

Masahiro WATANABE,  Shinpei TAMURA,  Tohru KANAZAWA,  Keisuke JINEN,  Masahiro ASADA,  

[Date]2005/1/20
[Paper #]ED2004-228,SDM2004-223
A study of an optimum structure of triple barrier resonant tunneling diodes

Hajime HORIE,  Michihiko SUHARA,  Naoya ASAOKA,  Masakazu FUKUMITSU,  Tsugunori OKUMURA,  

[Date]2005/1/20
[Paper #]ED2004-229,SDM2004-224
Fabrication and Characterization of GaAs BDD Quantum Node Devices Utilized Selective MBE Growth Technique

Takahiro TAMURA,  Miki YUMOTO,  Isao TAMAI,  Seiya KASAI,  Taketomo SATO,  Hideki HASEGAWA,  

[Date]2005/1/20
[Paper #]ED2004-230,SDM2004-225
High-Speed Digital IC Technology Based on Single-Flux-Quantum Circuits : Toward High-End Computing and Quantum Computing Application

Nobuyuki YOSHIKAWA,  

[Date]2005/1/20
[Paper #]ED2004-231,SDM2004-226
Implementation of Ultra-Low Power Nanoprocessors based on Hexagonal BDD Quantum Circuits

Seiya KASAI,  Miki YUMOTO,  Takahiro TAMURA,  Hideki HASEGAWA,  

[Date]2005/1/20
[Paper #]ED2004-232,SDM2004-227
Numerical Examinations of Single-Electron Neural Devices : Temperature Characteristics on Competitive Neural Network

Takahide OYA,  Tetsuya ASAI,  Ryo KAGAYA,  Tetsuya HIROSE,  Yoshihito AMEMIYA,  

[Date]2005/1/20
[Paper #]ED2004-233,SDM2004-228
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[Date]2005/1/20
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[Date]2005/1/20
[Paper #]
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[Date]2005/1/20
[Paper #]