IEICE Technical Committee

Electronics-Electron Devices(Date:2000/06/21)

Presentation

表紙

[Date]2000/6/21
[Paper #]

ED2000-44 / SDM2000-44 A Study on the Characteristics of High Performance Self-Aligned Asymmetric Structure(SAAS)

Chang-Soon Choi, Kyung-Whan Kim, Woo-Young Choi,

[Date]2000/6/21
[Paper #]ED2000-44,SDM2000-44

ED2000-45 / SDM2000-45 Excimer Laser Annealing for 0.1μm MOSFETs

Takashi NOGUCHI, Michitaka KUBOTA, Hiroshi YAMAMOTO, Kouichi MATSUMOTO, Machio YAMAGISHI,

[Date]2000/6/21
[Paper #]ED2000-45,SDM2000-45

ED2000-46 / SDM2000-46 Analysis of a High Performance Self-Aligned Elevated Source Drain MOSFET with Reduced Gate-Induced Drain-Leakage

Kyung-Whan Kim, Chang-Soon Choi, Woo-Young Choi,

[Date]2000/6/21
[Paper #]ED2000-46,SDM2000-46

ED2000-47 / SDM2000-47 New Process Technologies for Copper/Low-k Metallization : Abrasive-Free Copper CMP(AFP) and New Low-k Material:Methyl-silicon-oxycarbide(MTES)

Kenji Hinode, Sei-ichi Kondo, Takeshi Furusawa, Noriyuki Sakuma, Ryuzaki Daisuke, Ken-ichi Takeda, Machida Shun-taro, Yasushi Goto, Hizuru Yamaguchi, Yoshio Homma,

[Date]2000/6/21
[Paper #]ED2000-47,SDM2000-47

ED2000-48 / SDM2000-48 Sub 4-nm Polyoxide Using ECR(Electron Cyclotron Resonance) N_2O Plasma Oxidation

Sangyeon Han, Hyungcheol Shin,

[Date]2000/6/21
[Paper #]ED2000-48,SDM2000-48

ED2000-49 / SDM2000-49 Low-temperature Formation of Ultra-thin SiO_2 Films Using Oxygen Radicals and the Application for MOSFET Gate Insulator

M. Kanehiro, Y. Ueda, T. Kimoto, H. Matsunami,

[Date]2000/6/21
[Paper #]ED2000-49,SDM2000-49

ED2000-50 / SDM2000-50 Oxidation Behaviors of Ti-Polycide Gate Stack During Gate Re-oxidation

Tae-Kyun Kim, Se-Aug Jang, Jun-Mo Yang, Tae-Su Park, In-Seok Yeo, Jae-Sung Roh, Jeong-Mo Hwang,

[Date]2000/6/21
[Paper #]ED2000-50,SDM2000-50

ED2000-51 / SDM2000-51 Prospects and Key Issues for Compound Semiconductor Quantum Devices

Hideki Hasegawa, Seiya Kasai,

[Date]2000/6/21
[Paper #]ED2000-51,SDM2000-51

ED2000-52 / SDM2000-52 Development Activities at ASET for 100-nm Lithography and Beyond

Shinji Okazaki,

[Date]2000/6/21
[Paper #]ED2000-52,SDM2000-52

ED2000-53 / SDM2000-53 A Novel Integration Technology for Gigabit DRAM with 0.115μm Design Rule

Hyunpil Noh, Sangdon Lee, Woncheol Cho, Jongrim Lee, Gucheol Jeong, Sung-keun Chang, Hyunjo Yang, Dongseok Kim, Junki Kim, Jisoo Park, Junsik Lee, Jinwon Park, Hee-koo Yoon,

[Date]2000/6/21
[Paper #]ED2000-53,SDM2000-53

ED2000-54 / SDM2000-54 Microprocessor Technologies beyond GHz

Jeong-Hwan Yang, Jong-Hyun Ahn, Soo-Cheol Lee, Young-Wug Kim, Sung-Pae Park, Kwang-Pyuk Suh,

[Date]2000/6/21
[Paper #]ED2000-54,SDM2000-54

ED2000-55 / SDM2000-55 Demonstration of a Novel Multiple-valued T-gate using Multiple Junction Surface Tunnel Transistors and Its Application to Three-valued Data Flip-Flop

Tetsuya Uemura, Toshio Baba,

[Date]2000/6/21
[Paper #]ED2000-55,SDM2000-55

ED2000-56 / SDM2000-56 Room Temperature Negative Differential Resistance of CdF_2-CaF_2 Resonant Tunneling Diode on Si(111)

Masahiro Watanabe, Toshiyuki Funayama, Taishi Teraji, Naoto Sakamaki,

[Date]2000/6/21
[Paper #]ED2000-56,SDM2000-56

ED2000-57 / SDM2000-57 Memory Operation of an AlGaAs/GaAs Heterostructure FET with InAs Quantum Dots : Near Room Temperature Electric Write and Erase

J Nolde, T. Inayoshi, S. Kishimoto, T. Mizutani,