Electronics-Electron Devices(Date:1996/06/20)

Presentation
表紙

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[Date]1996/6/20
[Paper #]
目次

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[Date]1996/6/20
[Paper #]
16-bit Low Power Consumption Digital Signal Processor for the PDC Half-Rate CODEC

Kazuyuki ISHIKAWA,  Taketora SHIRAISHI,  Eiichi TERAOKA,  Kouichi NISHIDA,  

[Date]1996/6/20
[Paper #]ED96-43,SDM96-26,ICD96-46
Power Saving Of Multiplier-Accumulator Using Glitch Canceler Circuit

Isao Fukushi,  Tetsuyoshi Shiota,  Yoshiki Shimauchi,  Yoshio Kuniyasu,  Masanori Nose,  Satoru Sudo,  Kazuo Sukegawa,  

[Date]1996/6/20
[Paper #]ED96-44,SDM96-27,ICD96-47
1-V Multi-Threshold-Voltage CMOS DSP with Efficient Power Management for Mobile Communication Terminal

Shin'ichiro Mutoh,  Satoshi Shigematsu,  Yasuyuki Matsuya,  Hideki Fukuda,  Takao Kaneko,  Junzo Yamada,  

[Date]1996/6/20
[Paper #]ED96-45,SDM96-28,ICD96-48
Power Management Technique for 1-V LSIs using Embedded Processor

Satoshi SHIGEMATSU,  Shin'ichiro MUTOH,  Yasuyuki MATSUYA,  

[Date]1996/6/20
[Paper #]ED96-46,SDM96-29,ICD96-49
A 1V 50MHz 15mW 32Kb SRAM using Multi Vth 0.35μm CMOS Technology

Shoichiro Kawashima,  Shigetoshi Wakayama,  Yoshiki Shimauchi,  Osamu Tsuboi,  Kazuo Sukegawa,  Tatsuya Yamazaki,  

[Date]1996/6/20
[Paper #]ED96-47,SDM96-30,ICD96-50
Device-Deviation Tolerant Elastic-Vt CMOS Circuits with Fine-Grain Power Control Capability

Masayuki Mizuno,  Koichiro Furuta,  Satoshi Narita,  Hitoshi Abiko,  Isami Sakai,  Masakazu Yamashina,  

[Date]1996/6/20
[Paper #]ED96-48,SDM96-31,ICD96-51
A 0.9V 150MHz 10mW 4mm^2 2-D Discrete Cosine Transform Core Processor with Variable Threshold-Voltage (VT) Scheme

Tetsuya Fujita,  Tadahiro Kuroda,  Shinji Mita,  Tetsu Nagamatsu,  Shinichi Yoshioka,  Fumihiko Sano,  Masayuki Norishima,  Masayuki Murota,  Makoto Kako,  Masaaki Kinugawa,  Masakazu Kakumu,  Takayasu Sakurai,  

[Date]1996/6/20
[Paper #]ED96-49,SDM96-32,ICD96-52
Switched-Current Control Architecture for Low-Power High-Performance VLSI Systems

Satoshi Kazama,  Takahiro Hanyu,  Michitaka Kameyama,  

[Date]1996/6/20
[Paper #]ED96-50,SDM96-33,ICD96-53
A 5Gb/s 8×8 ATM Switch Element CMOS LSI Supporting 5 Quality-of-Service Classes with 200MHz LVDS Interface

Keiko Seki,  Yasuo Unekawa,  Kenji Sakaue,  Takehiko Nakao,  Shin'ichi Yoshioka,  Tetsu Nagamatsu,  Hideaki Nakakita,  Yasuyuki Kaneko,  Masahiko Motoyama,  Yoshihiro Ohba,  Koutaro Ise,  Masayoshi Ono,  Kuniyuki Fijiwara,  Yuichi Miyazawa,  Tadahiro Kuroda,  Yukio Kamatani,  Takayasu Sakurai,  Akira Kanuma,  

[Date]1996/6/20
[Paper #]ED96-51,SDM96-34,ICD96-54
Low-Power 622MHz Dynamic MOS MUX/DEMUX Circuits

H. KANNO,  

[Date]1996/6/20
[Paper #]ED96-52,SDM96-35,ICD96-55
Prospect of High Speed Compound Semiconductor Integrated Circuit Technology

Hidetoshi Nishi,  

[Date]1996/6/20
[Paper #]ED96-53,SDM96-36,ICD96-56
[OTHERS]

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[Date]1996/6/20
[Paper #]