Electronics-Electron Devices(Date:1995/06/23)

Presentation
表紙

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[Date]1995/6/23
[Paper #]
目次

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[Date]1995/6/23
[Paper #]
Circuit Techniques for Super Low Retention Current DRAM

Toru Iwata,  Hiroyuki Yamauchi,  

[Date]1995/6/23
[Paper #]
A Novel Power-Off Mode for A Battery-Backup DRAM

D. Takashima,  Y. Oowaki,  S. Watanabe,  K. Ohuchi,  

[Date]1995/6/23
[Paper #]
SOI-DRAM Circuit Technologies for Low Power High Speed Multi-giga Scale Memories

Shigehiro Kuge,  Fukashi Morishita,  Takahiro Tsuruda,  Shigeki Tomishima,  Masaki Tsukude,  Tadato Yamagata,  Kazutami Arimoto,  

[Date]1995/6/23
[Paper #]
Cached DRAM Application in Personal Computer : High Performance of Personal Computer by Cached DRAM

Takanori Tomioka,  Toshiyuki Ogawa,  Hideharu Toyomoto,  Makoto Ohta,  

[Date]1995/6/23
[Paper #]
Fast-Memory-Macrocell Testing Techniques with LSI Test Systems

Nobutaro Shibata,  Takako Ishihara,  

[Date]1995/6/23
[Paper #]
The Analysis of the Flash Memory Over-Erase Mechanism : A New Restriction on the Scaling Theory

Taishi Kubota,  Satoru Muramatsu,  Noriaki Kodama,  Mitsuhiro Horikawa,  Tomohisa Kitano,  Takeshi Okazawa,  

[Date]1995/6/23
[Paper #]
All Bipolar 3V 20mW Tracking Servo LSI for 8mm VCR

Futao Yamaguchi,  Katsunori Sato,  Fumiaki Miyamitsu,  Yoshihiro Sakamoto,  Hiroyuki Matsumoto,  

[Date]1995/6/23
[Paper #]
Design Methodology for Low-Voltage MOSFETs

Takeshi Andoh,  Akio Furukawa,  Takemitsu Kunio,  

[Date]1995/6/23
[Paper #]
Impact of the Reduction of the Gate to Drain Capacitance on Low Voltage Operated CMOS Devices

Kyoujj Yamashita,  Hiroaki Nakaoka,  Kazumi Kurimoto,  Hiroyuki Umimoto,  Shinji Odanaka,  

[Date]1995/6/23
[Paper #]
Impact of High-Temperature RTA for CMOSFET Design in the Deep Submicron Regime

Akihiro Shimizu,  Nagatosi Ohki,  Hiroshi Ishida,  Toshiaki Yamanaka,  Ken-ichi Kikushima,  Kousuke Okuyama,  Katsuhiko Kubota,  Atsuyoshi Koike,  

[Date]1995/6/23
[Paper #]
Design of a Low-power RISC Processor for Embedded Applications

Yukio Otaguro,  

[Date]1995/6/23
[Paper #]
Low Power RISC Processor for Nomadic Computing : Low Power management in Hitachi's SH3

J. Nishimoto,  S. Narita,  K. Ishibashi,  S. Tachibana,  K. Norisue,  Y. Shimazaki,  V. Uchiyama,  T. Nakazawa,  K. Hirose,  I. Kudoh,  R. Izawa,  S. Matsui,  S. Yoshioka,  M. Yamamoto,  I. Kawasaki,  

[Date]1995/6/23
[Paper #]
[OTHERS]

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[Date]1995/6/23
[Paper #]