Electronics-Component Parts and Materials(Date:2005/01/21)

Presentation
表紙

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[Date]2005/1/21
[Paper #]
目次

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[Date]2005/1/21
[Paper #]
10Gbps Serial Links Prototype for Saver and Router

Masayoshi YAGYU,  Hiroki YAMASHITA,  Fumio YUUKI,  Tasuya KAWASHIMO,  Yasuhiro FUJIMURA,  Yoshihumi TAKADA,  

[Date]2005/1/21
[Paper #]CPM2004-162,ICD2004-207
High reliability assurance method and its apprication on high density and large pin-count package

Syuhei Hashimoto,  Yassumasa Kawaguchi,  Minoru Hanyu,  Toshihiro Matsunaga,  Mitsuhisa Matsuo,  Naoko Kawatani,  Yasuhisa Higuchi,  Takahiko Takahashi,  

[Date]2005/1/21
[Paper #]CPM2004-163,ICD2004-208
Post-Packaging Auto Repair Techniques for Fast Row Cycle Embedded DRAM

Atsushi NAKAYAMA,  Toshimasa NAMEKAWA,  Hiroshi ITO,  FUJII Shuso /,  

[Date]2005/1/21
[Paper #]CPM2004-164,ICD2004-209
Investigation of diagnostic methods for analog circuits

Norio KUJI,  

[Date]2005/1/21
[Paper #]CPM2004-165,ICD2004-210
Improvement of RTL Fault Diagnosis Technology for Practical Use

Masafumi NIKAIDO,  Yukihisa FUNATSU,  

[Date]2005/1/21
[Paper #]CPM2004-166,ICD2004-211
On Observability Quantification for Fault Diagnosis of VLSI Circuits

Naoya TOYOTA,  Seiji KAJIHARA,  Xiaoqing WEN,  Masaru SANADA,  

[Date]2005/1/21
[Paper #]CPM2004-167,ICD2004-212
A Decompressor with Buffer for Test Compression / Decompression

Michihiro SHINTANI,  Masakuni OCHI,  Hideyuki ICHIHARA,  Tomoo INOUE,  

[Date]2005/1/21
[Paper #]CPM2004-168,ICD2004-213
On Finding Don't Cares in Test Sequences for Sequential Circuits and Applications to Test Compaction and Power Reduction

Yoshinobu HIGAMI,  Seiji KAJIHARA,  Shin-ya KOBAYASHI,  Yuzo TAKAMATSU,  

[Date]2005/1/21
[Paper #]CPM2004-169,ICD2004-214
LSI fault diagnosis by using functional test result and netlist extracted from CAD layout data

Katsuyoshi MIURA,  Koji NAKAMAE,  Hiromu FUJIOKA,  

[Date]2005/1/21
[Paper #]CPM2004-170,ICD2004-215
Selection of Seeds and Phase Shifters for Scan BIST

Masayuki ARAI,  Harunobu KUROKAWA,  Kenichi ICHINO,  Satoshi FUKUMOTO,  Kazuhiko IWASAKI,  

[Date]2005/1/21
[Paper #]CPM2004-171,ICD2004-216
Learning-Based Improvement in Fault Tolerance of Hopfield Associative Memories

Naotake KAMIURA,  Teijiro ISOKAWA,  Nobuyuki MATSUI,  

[Date]2005/1/21
[Paper #]CPM2004-172,ICD2004-217
New SoC Testing technologies for beyond 65nm process rule : New Failure Analysis and Testing methodologies for low-k/Cu Interconnect technique

Makoto YAMAZAKI,  Yasuo FURUKAWA,  

[Date]2005/1/21
[Paper #]CPM2004-173,ICD2004-218
Development of Multiple Fault Diagnosis Based on Path-Tracing for Logic LSIs

Yukihisa Funatsu,  Hiroshi Sumitomo,  Kazuki Shigeta,  Toshio Ishiyama,  

[Date]2005/1/21
[Paper #]CPM2004-174,ICD2004-219
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[Date]2005/1/21
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[Date]2005/1/21
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[Date]2005/1/21
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