IEICE Technical Committee

Communication-Electromagnetic Compatibility(Date:2014/06/13)

Presentation

表紙

[Date]2014/6/13
[Paper #]

Side-Channel Leakage on Silicon Substrate of CMOS Cryptographic Chip

Daisuke FUJIMOTO, Noriyuki MIURA, Makoto NAGATA, Yu-ichi HAYASHI, Naofumi HOMMA, Shivam BHASIN, Jean-Luc DANGER,

[Date]2014/6/13
[Paper #]EMCJ2014-10

Identification Method of Fault-injected Timing on Cryptographic Devices Using Side-channel Information

Ko NAKAMURA, Yu-ichi HAYASHI, Takaaki MIZUKI, Naofumi HOMMA, Takafumi AOKI, Hideaki SONE,

[Date]2014/6/13
[Paper #]EMCJ2014-11

Investigation on Aes Circuites in Information-Leaking-Behavior by Means of Internal Equivalent Current Source

Nobuhiro TAI, Kengo IOKIBE, Hiroto KAGOTANI, Hiroyuki OONISHI, Kazuhito MAESHIMA, Yoshitaka TOYOTA, Tetsushi WATANABE,

[Date]2014/6/13
[Paper #]EMCJ2014-12

Induction Characteristics of Power Line Models with No Branch and Outlet Branch from Surrounding Magnetic Field : Experimental Discussion by Using Open Area Test Site

Masamitsu TOKUDA, Chiharu MIYAZAKI, Yuichi SASAKI, Katsuyuki TANAKAJIMA, Hiroyuki OHSAKI,

[Date]2014/6/13
[Paper #]EMCJ2014-13

A Fundamental Study on Derivation of EMI from Through Silicon Vias(TSV)

Masashi KAWAKAMI, Kenji HASHIMOTO, Kimitoshi MURANO, Yoshio KAMI, Fengchao XIAO,

[Date]2014/6/13
[Paper #]EMCJ2014-14

Realistic Modeling of Japanese Standard Heads using Volume Morphing Technique

Tomoaki NAGAOKA, Kanako WAKE, Masao TAKI, Soichi WATANABE,

[Date]2014/6/13
[Paper #]EMCJ2014-15

Analysis of Conductive and Inductive Noise Couplings on TEG Chip with Magnetic Thin Film

Sho MUROGA, Peng FAN, Satoshi TANAKA, Tomomitsu KITAMRA, Hiroaki MATSUI, Naoya AZUMA, Shunsuke SHIMAZAKI, Junpei KOSAKA, Makoto NAGATA, Masahiro YAMAGUCHI,

[Date]2014/6/13
[Paper #]EMCJ2014-16

環境電磁工学研究専門委員会からのお知らせ

[Date]2014/6/13
[Paper #]

用語解説

[Date]2014/6/13
[Paper #]

複写される方へ

[Date]2014/6/13
[Paper #]

Notice for Photocopying

[Date]2014/6/13
[Paper #]

奥付

[Date]2014/6/13
[Paper #]

裏表紙

[Date]2014/6/13
[Paper #]