Information and Systems-Reconfigurable Systems(Date:2015/01/22)

Presentation
Obfuscated Hardware Implementation of PLC Instructions with Opaque Predicates

Kazuki UYAMA,  Naoki FUJIEDA,  Shuichi ICHIKAWA,  

[Date]2015/1/22
[Paper #]VLD2014-148,CPSY2014-157,RECONF2014-81
A Low Latency Real-Time Execution on Dependable Responsive Multithreaded Processor

Keigo MIZOTANI,  Yusuke HATORI,  Yusuke KUMURA,  Masayoshi TAKASU,  Hiroyuki CHISHIRO,  Nobuyuki YAMASAKI,  

[Date]2015/1/22
[Paper #]VLD2014-149,CPSY2014-158,RECONF2014-82
A Latency-Aware Packet Scheduling on Responsive Link

Kouhei OSAWA,  Shuma HAGIWARA,  Yusuke KUMURA,  Keigo MIZOTANI,  Masayoshi TAKASU,  Nobuyuki YAMASAKI,  

[Date]2015/1/22
[Paper #]VLD2014-150,CPSY2014-159,RECONF2014-83
Real-time contour extraction for moving objects directly operating MPEG encoded data

Syosuke MARUYAMA,  Hidehiro NAKANO,  Arata MIYAUCHI,  

[Date]2015/1/22
[Paper #]VLD2014-151,CPSY2014-160,RECONF2014-84
A Cache to Cache Communication Strategy for Wireless 3D Multi-Core Processors

Masataka MATSUMURA,  Masaaki KONDO,  Hiroki MATSUTANI,  Yasutaka WADA,  Hiroki HONDA,  

[Date]2015/1/22
[Paper #]VLD2014-152,CPSY2014-161,RECONF2014-85
複写される方へ

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[Date]2015/1/22
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Reprographic Reproduction outside Japan

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[Date]2015/1/22
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奥付

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[Date]2015/1/22
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裏表紙

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[Date]2015/1/22
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