Information and Systems-Dependable Computing(Date:2011/11/21)

Presentation
Power-Gating Circuit Scheme for Transient-Glitch Energy Reduction

Yuya OHTA,  Masaru KUDO,  Kimiyoshi USAMI,  

[Date]2011/11/21
[Paper #]VLD2011-90,DC2011-66
複写される方へ

,  

[Date]2011/11/21
[Paper #]
Notice for Photocopying

,  

[Date]2011/11/21
[Paper #]
奥付

,  

[Date]2011/11/21
[Paper #]
裏表紙

,  

[Date]2011/11/21
[Paper #]
<<123 41-45hit(45hit)