Information and Systems-Dependable Computing(Date:2013/11/20)

Presentation
Cu Wiring Technology for 3D/2.5D Packaging

Motoaki TANI,  Yoshihiro NAKATA,  Tsuyoshi KANKI,  Tomoji NAKAMURA,  

[Date]2013/11/20
[Paper #]VLD2013-75,CPM2013-119,ICD2013-96,CPSY2013-60,DC2013-41,RECONF2013-43
Chip Thinning Technologies for Chip Stacking Packages

Shinya TAKYU,  Tetsuya KUROSAWA,  

[Date]2013/11/20
[Paper #]VLD2013-76,CPM2013-120,ICD2013-97,CPSY2013-61,DC2013-42,RECONF2013-44
シングルコア向けのコードをNoCに実装するためのコード分割ツールの検討(システム設計(1),デザインガイア2013-VLSI設計の新しい大地-)

SATORU MIYASONO,  HIROSHI SAITO,  

[Date]2013/11/20
[Paper #]Vol.2013-SLDM-163 No.21
System-level design method considering the interrupt processing

Yuki ANDO,  Yukihito ISHIDA,  Shinya HONDA,  Hiroaki TAKADA,  Masato EDAHIRO,  

[Date]2013/11/20
[Paper #]VLD2013-77,DC2013-43
Function-Level Profiling for Embedded Software with QEMU

Tran Van Dung,  Ittetsu Taniguchi,  Takuji Hieda,  Hiroyuki Tomiyama,  

[Date]2013/11/20
[Paper #]VLD2013-78,DC2013-44
An Area Constraint-Based Fault-Secure HLS Algorithm for RDR Architectures Considering Trade-Off between Reliability and Time Overhead

Kazushi KAWAMURA,  Masao YANAGISAWA,  Nozomu TOGAWA,  

[Date]2013/11/20
[Paper #]VLD2013-79,DC2013-45
Development of a fine-grain power-gated CPU "Geyser-3" and adaptive power-off control to the temperature

Kimiyoshi USAMI,  Masaru KUDO,  Kensaku MATSUNAGA,  Tsubasa KOSAKA,  Yoshihiro TSURUI,  Weihan WANG,  Hideharu AMANO,  Ryuichi SAKAMOTO,  Mitaro NAMIKI,  Masaaki KONDO,  Hiroshi NAKAMURA,  

[Date]2013/11/20
[Paper #]VLD2013-80,DC2013-46
Energy Evaluation of Writing Reduction Method for Non-Volatile Memory

Masashi TAWADA,  Shinji KIMURA,  Masao YANAGISAWA,  Nozomu TOGAWA,  

[Date]2013/11/20
[Paper #]VLD2013-81,DC2013-47
Power Reduction of Non-volatile Logic Circuits Using the Minimum Writing Power Cut-set of State Registers

Yudai ITOI,  Shinji KIMURA,  

[Date]2013/11/20
[Paper #]VLD2013-82,DC2013-48
サイクルタイム制約を考慮した低消費電力な束データ方式による非同期式AVRプロセッサの設計(低消費電力技術,デザインガイア2013-VLSI設計の新しい大地-)

SHOTARO IWASAKI,  HIROSHI SAITO,  

[Date]2013/11/20
[Paper #]Vol.2013-SLDM-163 No.28
Evaluations of Variations on Ring Oscillators from Plasma Induced Damage in Bulk and SOTB Processes

Ryo KISHIDA,  Michitarou YABUUCHI,  Azusa OSHIMA,  Kazutoshi KOBAYASHI,  

[Date]2013/11/20
[Paper #]VLD2013-83,DC2013-49
A Study on Design Structure of Ring Oscillators with Plural Frequency Characteristics in FPGAs

Yousuke MIYAKE,  Masafumi MONDEN,  Yasuo SATO,  Seiji KAJIHARA,  

[Date]2013/11/20
[Paper #]VLD2013-84,DC2013-50
An inverter block construction method to reduce test data volume on BAST

Marika TANAKA,  Hiroshi YAMAZAKI,  Toshinori HOSOKAWA,  Masayoshi YOSHIMURA,  Masayuki ARAI,  Michinobu NAKAO,  

[Date]2013/11/20
[Paper #]VLD2013-85,DC2013-51
The age of Space Discovery Opened by World's First Solar Sail "IKAROS"

Osamu MORI,  

[Date]2013/11/20
[Paper #]VLD2013-86,CPM2013-121,ICD2013-98,CPSY2013-62,DC2013-52,RECONF2013-45
Toward VLSI Reliability Enhancement by Reconfigurable Architecture

Takao ONOYE,  Masanori HASHIMOTO,  Yukio MITSUYAMA,  Dawood ALNAJJAR,  Hiroaki KONOURA,  

[Date]2013/11/20
[Paper #]VLD2013-87,CPM2013-122,ICD2013-99,CPSY2013-63,DC2013-53,RECONF2013-51
Real-Time Video Processing Programming with GPU on Android Platform

MINGYU CHENG,  AKIRA KITAJIMA,  

[Date]2013/11/20
[Paper #]Vol.2013-SLDM-163 No.34
A thermal optimal charging system based on inner battery temperature management

YUSUKE YAMAMOTO,  KEIJI KATO,  YUKI KITAGAWA,  MASAHIRO FUKUI,  

[Date]2013/11/20
[Paper #]Vol.2013-SLDM-163 No.35
Study for Modeling and Optimization of Power Management in Nushima DC Micro Grid

TAKEHO IKEDA,  RYOSUKE MIYAHARA,  MASAHIRO FUKUI,  

[Date]2013/11/20
[Paper #]Vol.2013-SLDM-163 No.36
On Synthesis Algorithm for Parallel Index Generator Units

Yusuke MATSUNAGA,  

[Date]2013/11/20
[Paper #]VLD2013-88,DC2013-54
A Thermal Analysis Algorithm for LSI Chip by GPGPU

Takashi OMURA,  Lei LIN,  Lin MENG,  Masahiro FUKUI,  

[Date]2013/11/20
[Paper #]VLD2013-89,DC2013-55
<<123>> 21-40hit(57hit)