Information and Systems-Dependable Computing(Date:2009/11/25)

Presentation
Analysis of Layout Structure Dependency on Distance/Space Variation for MOS Transistors

Yuichi SADOHIRA,  Shigetoshi NAKATAKE,  

[Date]2009/11/25
[Paper #]VLD2009-61,DC2009-48
A Test Compaction Oriented Don't Care Identification Method

Motohiro WAKAZONO,  Toshinori HOSOKAWA,  Masayoshi YOSHIMURA,  

[Date]2009/11/25
[Paper #]VLD2009-62,DC2009-49
A secure design for testability of RSA encryption circuits

Teppei HAYAKAWA,  Toshinori HOSOKAWA,  Masayoshi YOSHIMURA,  

[Date]2009/11/25
[Paper #]VLD2009-63,DC2009-50
Logic stabilization way of open fault with unsuitable logic : Aim in simple diagnosis technology

Masaru SANADA,  Keiji HASHIDA,  Taiki YASUTOMI,  

[Date]2009/11/25
[Paper #]VLD2009-64,DC2009-51
A Path Selection Method of Delay Test for Transistor Aging

Mitsumasa NODA,  Seiji KAJIHARA,  Yasuo SATO,  Kohei MIYASE,  Xiaoqing WEN,  Takaya MIURA,  

[Date]2009/11/25
[Paper #]VLD2009-65,DC2009-52
Evaluation of Energy Consumption on Multipliers Using the Sum of Operands

Hirotaka KAWASHIMA,  Naofumi TAKAGI,  

[Date]2009/11/25
[Paper #]VLD2009-66,DC2009-53
Automatic Generation of Design-Specific Cell Libraries

Hiroaki YOSHIDA,  Masahiro FUJITA,  

[Date]2009/11/25
[Paper #]VLD2009-67,DC2009-54
FlexMerge: A Logic Optimization Technique to Minimize Area for LUT-based FPGAs

Taiga TAKATA,  Yusuke MATSUNAGA,  

[Date]2009/11/25
[Paper #]VLD2009-68,DC2009-55
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[Date]2009/11/25
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[Date]2009/11/25
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