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Technical Committee on Reconfigurable Systems (RECONF)  (2010)

Chair: Kentaro Sano (RIKEN)
Vice Chair: Yoshiki Yamaguchi (Tsukuba Univ.), Tomonori Izumi (Ritsumeikan Univ.)
Secretary: Yuuki Kobayashi (NEC), Hiroki Nakahara (Tokyo Inst. of Tech.)
Assistant: Yukitaka Takemura (INTEL), Yasunori Osana (Ryukyu Univ.)

Search Results: Keywords 'from:2010-05-13 to:2010-05-13'

[Go to Official RECONF Homepage (Japanese)] 
Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Ascending)
 Results 1 - 18 of 18  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
RECONF 2010-05-13
13:30
Nagasaki   FPGA Implementation of Fast Proportional Digital PID Control for DC-DC Converters
Kazuma Hamawaki, Yuki Maeda, Masato Soejima, Yuichiro Shibata, Kiyoshi Oguri, Fujio Kurokawa (Nagasaki Univ.) RECONF2010-1
DC power supply systems have been gathering attention because they have lower power loss and higher energy efficiency co... [more] RECONF2010-1
pp.1-6
RECONF 2010-05-13
13:55
Nagasaki   An FPGA implementation of Full-search variable block size motion Estimation
Shuichi Asano, Zhi Shun Zheng, Tsutomu Maruyama (Univ. of Tsukuba) RECONF2010-2
In this paper, we propose an approach for full-search variable block size motion estimation using an FPGA. We can realiz... [more] RECONF2010-2
pp.7-12
RECONF 2010-05-13
14:20
Nagasaki   Real-time processing of contrast limited adaptive histogram equalization on FPGA
Kentaro Kokufuta, Tsutomu Maruyama (Univ. of Tsukuba) RECONF2010-3
Contrast limited adaptive histogram equalization (CLAHE) is a technique to enhance the visibility of local details of an... [more] RECONF2010-3
pp.13-18
RECONF 2010-05-13
14:55
Nagasaki   A study on multicore designed MuCCRA3 : dynamically reconfigurable processor array
Eiichi Sasaki, Yoshiki Saito, Masayuki Kimura, Hideharu Amano (Keio Univ.) RECONF2010-4
Recently, since a mobile device is required to provide various functions,
a lot of specialized hardware modules must be... [more]
RECONF2010-4
pp.19-24
RECONF 2010-05-13
15:20
Nagasaki   First Prototype Chip of a Non-Volatile Reconfigurable Logic using FeRAM Cells
Masahiro Koga, Masahiro Iida, Motoki Amagasaki (Kumamoto Univ.), Yoshinobu Ichida, Mitsuro Saji, Jun Iida (ROHM), Toshinori Sueyoshi (Kumamoto Univ.) RECONF2010-5
An advantage of a RLD such as an FPGA is that it can be customized after being manufactured. However, there is a problem... [more] RECONF2010-5
pp.25-30
RECONF 2010-05-13
15:45
Nagasaki   Digit-Serial Floating Point Unit for High Precision Scientific Computation Engine
Kazuya Tanigawa, Taiga Ban, Tetsuo Hironaka (Hiroshima City Univ.) RECONF2010-6
We have developed digit serial floating point (DSFP) units that are possible to achieve high precision calculation in a ... [more] RECONF2010-6
pp.31-36
RECONF 2010-05-13
16:20
Nagasaki   A Case Study of Evaluation Technique for Soft Error Tolerance on SRAMs-based FPGAs.
Tsuyoshi Kimura, Noritaka Kai, Yoshiaki Tsutsumi, Motoki Amagasaki, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2010-7
SRAM-based field programmable gate arrays (FPGAs) are vulnerable to a single event upset (SEU),which is induced by radia... [more] RECONF2010-7
pp.37-42
RECONF 2010-05-13
16:45
Nagasaki   A datapath classification method for efficient arithmetic pipeline combining on FPGAs
Yui Ogawa, Tomonori Ooya (Nagasaki Univ.), Yasunori Osana (Seikei Univ.), Masato Yoshimi (Doshisha Univ.), Yuri Nishikawa, Akira Funahashi, Noriko Hiroi, Hideharu Amano (Keio Univ.), Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2010-8
 [more] RECONF2010-8
pp.43-48
RECONF 2010-05-13
17:20
Nagasaki   [Invited Talk] Stream processing bring out performance of wired logic
Kiyoshi Oguri (Nagasaki Univ.) RECONF2010-9
Conventional information processing, in which data are first stored in memory LSI (Large Scale Integrated circuit) and o... [more] RECONF2010-9
pp.49-50
RECONF 2010-05-14
09:30
Nagasaki   Detecting patterns in various size and angle using FPGA
Masayuki Suzuki, Yoshifumi Tanida, Tsutomu Maruyama (Univ. of Tsukuba) RECONF2010-10
In this paper, we describe an approach for detecting patterns in various size and angle using FPGA. In our approach, the... [more] RECONF2010-10
pp.51-56
RECONF 2010-05-14
09:55
Nagasaki   An FPGA Implementation of Tracking Control System with Vibration Control
Yasuaki Tezuka, Shuichi Ichikawa, Yoshiyuki Noda (TUT) RECONF2010-11
Recent control systems are required to finish massive and complex
calculations in a very short period. Hardware impleme... [more]
RECONF2010-11
pp.57-62
RECONF 2010-05-14
10:20
Nagasaki   A study of a single-instruction variable-data processor on an FPGA
Syoji Tanabe, Yoshiki Yamaguchi, Moritoshi Yasunaga (Univ. of Tsukuba)
 [more]
RECONF 2010-05-14
10:55
Nagasaki   Software-Hardware Communication and Remote Call on a PC-FPGA Hybrid Cluster
Masaki Kohata, Akira Uejima, Ryo Ozaki (Okayama Univ. of Sci.) RECONF2010-12
Parallel processing with PC cluster and hardware acceleration with FPGA are useful technologies in a field of high perfo... [more] RECONF2010-12
pp.63-68
RECONF 2010-05-14
11:20
Nagasaki   GALS Design for Scalable Array Processors Operating on Multiple FPGAs
Wang Luzhou, Kentaro Sano, Satoru Yamamoto (Tohoku Univ.) RECONF2010-13
So far we have proposed systolic computational-memory (SCM) architecture for high-performance and scalable computation b... [more] RECONF2010-13
pp.69-74
RECONF 2010-05-14
11:45
Nagasaki   Evaluation using Multiple Different Applications of OS for an FPGA-based Reconfigurable System
Akira Kojima, Kazuya Tokunaga, Tetsuo Hironaka (Hiroshima City Univ.) RECONF2010-14
Reconfigurable devices can be configured any logical hardware structures by users. Reconfigurable systems that have reco... [more] RECONF2010-14
pp.75-80
RECONF 2010-05-14
13:15
Nagasaki   An Efficient Implementation of Exhaustive Verification of the Collatz Conjecture using DSP48E blocks of Xilinx Virtex-5 FPGAs
Yasuaki Ito, Koji Nakano (Hiroshima Univ.) RECONF2010-15
Consider the following operation on an arbitrary positive number: if the number is even, divide it by two, and if the nu... [more] RECONF2010-15
pp.81-86
RECONF 2010-05-14
13:40
Nagasaki   Implementation of Arithmetic Pipeline on FLOPS-2D:Multi-FPGA Platform
Hirokazu Morishita, Kenta Inakagata (Keio Univ.), Yasunori Osana (Seikei Univ.), Naoyuki Fujita (JAXA), Hideharu Amano (Keio Univ.) RECONF2010-16
Recently, CFD has been attracted as a useful simulation method for aerocraft components. UPACS, one of the practical CFD... [more] RECONF2010-16
pp.87-92
RECONF 2010-05-14
14:05
Nagasaki   A translational system using dynamic reconfigurable processor
Kei Kinoshita, Daisuke Takano, Tomoyuki Okamura, Tetsuhiko Yao, Yoshiki Yamaguchi (Univ. of Tsukuba) RECONF2010-17
The demand to capture a wide-angle and high-definition video stream has been risen for systems of surveillance, in-vehic... [more] RECONF2010-17
pp.93-98
 Results 1 - 18 of 18  /   
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