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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| CPM, ED, LQE | 2022-11-24 14:35 |
Aichi | Winc Aichi (Aichi Industry & Labor Center) (Primary: On-site, Secondary: Online) |
Evaluation of Fe Induced Trap in GaN HEMTs using Low-Frequency Y22 Measurement Taiki Nishida, Toshiyuki Oishi (Saga Univ.), Tomohiro Otsuka, Yutaro Yamaguchi, Shintaro Shinjo, Koji Yamanaka (Mitsubishi Elec. Corp.)  ED2022-34 CPM2022-59 LQE2022-67 |
One issue in improving amplifier performance using GaN is evaluating the characteristics of traps. In this study, we eva... [more] | ED2022-34 CPM2022-59 LQE2022-67 pp.49-52 |
| SCE | 2020-11-25 14:20 |
Online | Online | Design and bit-error-late evaluation of a Josephson latching driver using 10-kA/cm2 Nb process Yuki Hironaka, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2020-8 |
We have been developing Josephson-CMOS hybrid memory, which is a combination of CMOS memory and Josephson logic circuits... [more] | SCE2020-8 pp.1-6 |
| SCE | 2020-11-25 14:45 |
Online | Online | Enhanced Operation Frequencies of Bipolar Double-Flux-Quantum Amplifiers Fabricated Using a Nb 10-kA/cm2 Integration Process Yuta Somei, Hiroshi Shimada, Yoshinao Mizugaki (UEC) SCE2020-9 |
A Double-Flux-Quantum Amplifier (DFQA) is a superconducting voltage multiplier that can generate a high-precision voltag... [more] | SCE2020-9 pp.7-11 |
| SCE | 2020-01-17 13:15 |
Kanagawa | [Poster Presentation]
Optimization of a Josephson latching driver using 10-kA/cm2 Nb process for a Josephson-CMOS hybrid memory Yuki Hironaka, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2019-47 |
Josephson digital circuits such as single flux quantum circuits have a great potential for future high-end computing sys... [more] | SCE2019-47 pp.73-74 |
|
| ICD, CPSY, CAS | 2018-12-23 09:30 |
Okinawa | [Poster Presentation]
Design of 140GHz Area-and-Power-Efficient VCO using Frequency Doubler Yoshitaka Otsuki, Daisuke Yamazaki, Nguyen Ngoc Mai-Khanh, Tetsuya Iizuka (Tokyo Univ.) CAS2018-98 ICD2018-82 CPSY2018-64 |
This report summarizes the design of a D-band VCO that realizes small area, low phase noise and low power consumption. ... [more] |
CAS2018-98 ICD2018-82 CPSY2018-64 pp.83-88 |
|
| MW, EMCJ, EST, IEE-EMC [detail] | 2017-10-20 11:05 |
Akita | Yupopo | 5.8GHz High Efficiency GaN Amplifier for Practical Use of Microwave Power Transfer Koji Yamanaka, Kazuhiro Iyomasa, Masatake Hangai, Hiromitsu Utsumi, Jun Nishihara, Yukihiro Homma (Mitsubishi Electric), Kenji Sakaki (J-SS) EMCJ2017-47 MW2017-99 EST2017-62 |
In this paper, a state-of-the-art high power and high efficiency GaN HEMT amplifier, which is to be used in 5.8GHz micro... [more] | EMCJ2017-47 MW2017-99 EST2017-62 pp.117-122 |
| MW, ICD | 2017-03-03 13:40 |
Okayama | Okayama Prefectural Univ. | [Special Talk]
Design and Evaluation of Two Stage Wideband Negative Feedback Amplifier Using Voltage Feedback Pair Hiroto Otsuka, Ryo Ishikawa, Kazuhiko Honjo (UEC) MW2016-211 ICD2016-141 |
Microwave Circuit Design Universiade 2016 supported by the Technical Committee on Microwave, IEICE, was held for a wideb... [more] | MW2016-211 ICD2016-141 pp.127-130 |
| EE | 2017-01-26 14:45 |
Nagasaki | Nagasaki University | [Poster Presentation]
Effect on Voltage Dividing Class E Amplifier by Parasitic Capacitances of Drive Circuit Katsutoshi Hirayama (Nagasaki Univ.), Tadashi Suetsugu (Fukuoka Univ.), Hidenori Maruta, Fujio Kurokawa (Nagasaki Univ.) EE2016-69 |
This paper considers influence of voltage dividing class E amplifier by parasitic capacitances of diode of connected to ... [more] | EE2016-69 pp.107-110 |
| EE | 2016-11-28 13:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Poster Presentation]
Effect on Voltage Dividing Class E Amplifier by Circuit Parameters Katsutoshi Hirayama, Takuya Shirakawa (Nagasaki Univ.), Tadashi Suetsugu (Fukuoka Univ.), Hidenori Maruta, Fujio Kurokawa (Nagasaki Univ.) EE2016-40 |
Effect on voltage dividing class E amplifier by circuit parameters is considered. Voltage dividing class E amplifier can... [more] | EE2016-40 pp.57-60 |
| EE, WPT (Joint) |
2016-10-07 10:50 |
Kyoto | Sub Optimal Operation of Voltage Dividing Class E Amplifier in Load Variation Katsutoshi Hirayama, Takuya Shirakawa (Nagasaki Univ.), Tadashi Suetsugu (Fukuoka Univ.), Hidenori Maruta, Fujio Kurokawa (Nagasaki Univ.) EE2016-25 |
The purpose of this paper is to present the class E amplifier connecting the transistors in series, and some of connecte... [more] | EE2016-25 pp.37-41 |
|
| EE, IEE-SPC | 2016-07-14 14:45 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | On a Study of Voltage Dividing Class E Amplifier Katsutoshi Hirayama, Yudai Furukawa, Takuya Shirakawa (Nagasaki Univ.), Tadashi Suetsugu (Fukuoka Univ.), Hidenori Maruta, Fujio Kurokawa (Nagasaki Univ.) EE2016-10 |
The purpose of this paper is to present the splitting of peak switch voltage by series connected transistors in the clas... [more] | EE2016-10 pp.49-52 |
| SCE | 2015-08-04 14:45 |
Kanagawa | Yokohama National Univ. | Feeding methods of SFQ pulse trains in evaluation of DFQ amplifiers Yoshiaki Urai, Hiroshi Shimada, Yoshinao Mizugaki (UEC Tokyo) SCE2015-11 |
Toward the realization of next generation AC voltage standards, RSFQ-D/A converters of the frequency modulation type hav... [more] | SCE2015-11 pp.17-22 |
| EID, ITE-IDY, IEIJ-SSL, IEE-EDD, SID-JC [detail] | 2015-01-23 09:00 |
Kyoto | Ryukoku University | Magnetic-Field Sensor using Poly-Si Hall Device
-- Sensitivity Improved by High Voltage Application and OpAmp Circuits -- Akito Yoshikawa, Takaaki Matsumoto, Shougo Miyamura, Haruki Shiga, Tokiyoshi Matsuda, Mutsumi Kimura (Ryukoku Univ.), Tokuro Ozawa, Koji Aoki, Chih-Che Kuo (AUOJ) EID2014-47 |
We are executing research and development of magnetic field sensors using poly-Si Hall devices. In this study, in order ... [more] | EID2014-47 pp.49-52 |
| ICD | 2014-04-18 09:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | A 0.38-V Operating STT-MRAM with Process Variation Tolerant Sense Amplifier Yohei Umeki, Koji Yanagida, Shusuke Yoshimoto, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi (Kobe Univ.), Koji Tsunoda, Toshihiro Sugii (LEAP) ICD2014-10 |
This paper exhibits a 65-nm 8-Mb spin transfer torque magnetoresistance random access memory (STT-MRAM) operating at a s... [more] | ICD2014-10 pp.47-51 |
| ICD | 2014-01-28 15:00 |
Kyoto | Kyoto Univ. Tokeidai Kinenkan | [Poster Presentation]
Time Domain Offset Voltage Detector for Self Calibrating Dynamic Latched Comparator Takayuki Okazawa, Ippei Akita, Makoto Ishida (Toyohashi Univ. of Tech.) ICD2013-102 |
A low-offset dynamic latched comparator is required in precision ADCs. A pre-amplifier is usually used in front of dyna... [more] |
ICD2013-102 p.9 |
| ICD, ITE-IST | 2013-07-05 14:00 |
Hokkaido | San Refre Hakodate | A Voltage Scaling 0.25-1.8 V Delta-Sigma Modulator with Inverter-Opamp Self-Configuring Amplifier Kentaro Yoshioka, Yousuke Toyama, Teruo Jyo, Hiroki Ishikuro (Keio Univ.) ICD2013-38 |
A 2nd order discrete time (DT) DS modulator with very wide supply voltage range of 0.25-1.8 V is presented. An inverter-... [more] | ICD2013-38 pp.89-92 |
| ICD | 2013-04-12 15:55 |
Ibaraki | Advanced Industrial Science and Technology (AIST) | [Invited Lecture]
A 250MHz 18Mb Full Ternary CAM with 0.3V Match Line Sense Amplifier in 65nm CMOS Isamu Hayashi, Teruhiko Amano, Naoya Watanabe, Yuji Yano, Yasuto Kuroda, Masaya Shirata, Katsumi Dosaka, Koji Nii, Hideyuki Noda, Hiroyuki Kawai (Renesas Electronics) ICD2013-22 |
An 18Mb full ternary CAM with 0.3V match line sense amplifier (LV-MA) is designed and fabricated in 65nm bulk CMOS proce... [more] | ICD2013-22 pp.115-120 |
| MW, ED | 2013-01-18 11:15 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | The study of SSPS GaN amplifier for high-efficiency operation by gate length Yutaro Yamaguchi, Toshiyuki Oishi, Hiroshi Otsuka, Takaaki Yoshioka, Hidetoshi Koyama, Fuminori Samejima, Yoshinori Tsuyama, Koji Yamanaka (Mitsubishi Electric Corp.) ED2012-121 MW2012-151 |
In this paper, GaN HEMT high efficiency amplifier for Space Solar Power Stations/System (SSPS) is presented. 0.25μm gate... [more] | ED2012-121 MW2012-151 pp.49-52 |
| ICD | 2012-12-17 15:55 |
Tokyo | Tokyo Tech Front | [Poster Presentation]
Ultra-Low-Voltage Dynamic Amplifier James Lin, Masaya Miyahara, Akira Matsuzawa (Tokyo Inst. of Tech.) ICD2012-109 |
This paper proposes an ultra-low-voltage, wide signal swing and clock-scalable differential dynamic amplifier using a co... [more] | ICD2012-109 p.71 |
| ICD | 2012-12-18 14:20 |
Tokyo | Tokyo Tech Front | High Efficiency 315MHz Transmitter with Dual Supply Voltage Scheme Shunta Iguchi (Univ. of Tokyo), Akira Saito, Kazunori Watanabe (STARC), Takayasu Sakurai, Makoto Takamiya (Univ. of Tokyo) ICD2012-119 |
Dual power supply voltage (VDD) scheme is proposed to increase the efficiency of a power amplifier (PA) with small outpu... [more] | ICD2012-119 pp.121-126 |
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