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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| QIT (2nd) |
2023-12-19 11:15 |
Okinawa | OIST (Primary: On-site, Secondary: Online) |
Unification and Improvement of Quantum Error Mitigation Methods via Generalized Quantum Subspace Expansion Shigeo Hakkaku (NTT), Nobuyuki Yoshioka (UTokyo), Yuuki Tokunaga, Suguru Endo (NTT) |
Numerous quantum error mitigation methods are proposed to make the most of noisy quantum devices that lack the capabilit... [more] | |
| SS | 2019-03-04 17:10 |
Okinawa | Formal STAMP Modelling toward Safety Verification of Hybrid Systems Mitsuaki Tsuji, Toshinori Takai (NAIST), Masafumi Katahira, Naoki Ishihama (JAXA), Kazuki Kakimoto, Hajimu Iida (NAIST)  SS2018-67 |
Safety-critical systems, for example, autonomous vehicles and space systems, are required to be safe and reliable. Recen... [more] | SS2018-67 pp.91-96 |
|
| ICM | 2018-03-09 10:20 |
Okinawa | A study on verification method of firewall rules in cloud era Takuma Utsunomiya, Naoki Oguchi (Fujitsu) ICM2017-68 |
A technique to build network slice as a virtual network is demanded from a cloud, 5G, the spread of techniques such as I... [more] | ICM2017-68 pp.73-77 |
|
| PRMU, BioX | 2017-03-21 16:25 |
Aichi | An Improvement of Signature Authentication Rate by Dividing Japanese Characters with Watersheds Scheme Haruka Ohashi, Keiko Masuda, Seiichiro Hangai (TUS) BioX2016-72 PRMU2016-235 |
Online signature verification is one of the biometric verification techniques using behavior. It can use time-series dat... [more] | BioX2016-72 PRMU2016-235 pp.233-236 |
|
| KBSE, SS, IPSJ-SE [detail] | 2016-07-13 10:20 |
Hokkaido | A Method to Revise Message Ordering in Sequence Diagram Kozo Okano (Shinshu Univ.), Satoshi Harauchi (Mitsubishi Electric Corp.), Yosuke Tajima, Shinpei Ogata (Shinshu Univ.) SS2016-2 KBSE2016-8 |
For software specification, a lot of methods have been proposed in order to localize defects and to fix defects automat... [more] |
SS2016-2 KBSE2016-8 pp.7-12 |
|
| EA, SP, SIP | 2016-03-29 09:00 |
Oita | Beppu International Convention Center B-ConPlaza | [Poster Presentation]
Speaker verification using weight-adapted score fusion in noisy reverberant environments Ryosuke Nakanishi, Sayaka Shiota, Hitoshi Kiya (Tokyo Metropolitan Univ.) EA2015-114 SIP2015-163 SP2015-142 |
This paper proposes a weight estimation method for automatic speaker verification (ASV) using score fusion in noisy reve... [more] | EA2015-114 SIP2015-163 SP2015-142 pp.267-272 |
| VLD | 2016-02-29 13:30 |
Okinawa | Okinawa Seinen Kaikan | Tool Support for Verifying Large Scale Hardware Design with Verilog-HDL Yuta Morimitsu, Tomoyuki Yokogawa (Okayama Prefectural Univ.), Masafumi Kondo, Hisashi Miyazaki (Kawasaki Univ. of Medical Welfare), Yoichiro Sato, Kazutami Arimoto (Okayama Prefectural Univ.), Norihiro Yoshida (Nagoya Univ.) VLD2015-111 |
In this paper, we developed a tool supporting formal verification of large scale hardware design described by Verilog-HD... [more] | VLD2015-111 pp.1-6 |
| VLD | 2016-03-01 14:45 |
Okinawa | Okinawa Seinen Kaikan | IP Design using High-Level Synthesis Design Flow Masato Tatsuoka, Ken Imanishi, Hidenori Nakaishi, Takeshi Toyoyama (SNI) VLD2015-126 |
In this paper we will describe practical experiences about the use of high level synthesis technologies to achieve highe... [more] | VLD2015-126 pp.87-92 |
| SS, MSS | 2016-01-25 18:30 |
Ishikawa | Shiinoki-Geihin-Kan | A Study of a Practical Approach to Verifying Control Systems using Model-Checking and Testing Junya Matsubara, Rieko Takagi, Teruyuki Nakazawa (Denso Create), Tetsuya Tohdo, Hiroyuki Ihara, Yukinori Kawaai (Denso) MSS2015-52 SS2015-61 |
Due to the automotive control systems have become complex, it is necessary to ensure the dependability of the systems. I... [more] | MSS2015-52 SS2015-61 pp.99-103 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-03 09:45 |
Nagasaki | Nagasaki Kinro Fukushi Kaikan | Hardware Trojan Identification based on Netlist Features using SVM Kento Hasegawa, Oya Masaru, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.) VLD2015-58 DC2015-54 |
Recently, third-party IC vendors are very often used due to globalization and cost-reduction in the IC market but malic... [more] |
VLD2015-58 DC2015-54 pp.135-140 |
| SP, IPSJ-SLP (Joint) |
2015-07-17 13:10 |
Nagano | Katakura Suwako Hotel | A study on effectiveness of pop noise for speaker verification Shiori Nakano, Ryosuke Nakanishi, Sayaka Shiota, Hitoshi Kiya (Tokyo Metro Univ.) SP2015-47 |
This paper investigates an effectiveness of pop noise, which is unconsciously caused by human breath, for automatic spea... [more] | SP2015-47 pp.67-72 |
| IA, IPSJ-IOT, SITE [detail] | 2014-02-28 13:45 |
Ishikawa | Hotel Rurikoh | Implementation of Direction based Channel Separation Method and Flow Balancing Method for Multi-Channel Wireless Backbone Network Masaki Tagawa (Kyushu Inst. of Tech.), Yuzo Taenaka (Univ. of Tokyo), Kazuya Tsukamoto (Kyushu Inst. of Tech.) SITE2013-72 IA2013-97 |
This study implements an architecture of traffic management on multi-channel wireless backbone network. We propose chann... [more] | SITE2013-72 IA2013-97 pp.165-170 |
| SP, NLC, IPSJ-SLP [detail] | 2011-12-20 10:30 |
Tokyo | Speaker Verification Using MMAP Adaptation Sangeeta Biswas, Johan Rohdin, Koichi Shinoda, Sadaoki Furui (Tokyo Inst. of Tech.) NLC2011-48 SP2011-93 |
This paper proposes maximum a posteriori (MAP) adaptation of Gaussian mixture models (GMM) using multiple priors for tex... [more] | NLC2011-48 SP2011-93 pp.133-137 |
|
| SS | 2009-03-02 17:00 |
Saga | Saga University | [Invited Talk]
Model Checking of Timed Automata Akio Nakata (Hiroshima City Univ.) SS2008-53 |
In this paper, we briefly describe model checking of timed automata, one of the verification techniques of real-time sys... [more] | SS2008-53 pp.29-34 |
| VLD, IPSJ-SLDM | 2007-05-11 09:30 |
Kyoto | Kyodai Kaikan | Automatic Generation of a Verification Environment for Hardware Units
-- Application to a Bus Bridge Design -- Rafael Kazumiti Morizawa, Hiroaki Iwashita, Koichiro Takayama (Fujitsu Labs.) VLD2007-7 |
The verification cost of complex SoCs has been increasing in a fast pace. Many techniques and methodologies have been de... [more] | VLD2007-7 pp.1-6 |
| SS | 2006-06-22 13:30 |
Okayama | A complete specification transformation from OTS/CafeOBJ to OTS/Maude Masaki Nakamura, Weiqiang Kong, Kazuhiro Ogata, Kokichi Futatsugi (JAIST) |
There are two ways to describe a state machine with algebraic specifications: observation transition systems on CafeOBJ ... [more] | SS2006-13 pp.1-6 |
|
| SS | 2006-04-20 15:40 |
Niigata | Niigata Univ., Igarashi Campus | Formal method of real-time statechart Manabu Tokuda, Satoshi Yamane (Kanazawa Univ.) |
Recently, real-time systems have been used in many fields, and they have become large. In this situation the formal spe... [more] |
SS2006-5 pp.25-30 |
| SS | 2005-10-14 10:30 |
Saitama | Jumonji University | Parametric Verification towards Design of Real-Time Systems Chaiwat Sathawornwichit, Takuya Katayama (JAIST) |
Timing characteristic is an important point of concern in the design of real-time systems, because the systems are to o... [more] |
SS2005-51 pp.19-24 |
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