Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
SDM |
2017-01-30 10:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Demonstrating Performance Improvement of Complementary TFET Circuits by ION Enhancement Based on Isoelectronic Trap Technology Takahiro Mori, Hidehiro Asai, Junichi Hattori, Koichi Fukuda, Shintaro Otsuka, Yukinori Morita, Shin-ichi O'uchi, Hiroshi Fuketa, Shinji Migita, Wataru Mizubayashi, Hiroyuki Ota, Takashi Matuskawa (ANational Institute of Advanced Industrial ScieIST) SDM2016-130 |
We improved the performance of a complementary circuit comprising Si-based tunnel field-effect transistors (TFETs) by us... [more] |
SDM2016-130 pp.1-4 |
SDM |
2016-01-28 13:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Van der Waals Junctions of Layered 2D Materials for Functional Devices Tomoki Machida, Rai Moritani, Yohta Sata, Takehiro Yamaguchi, Miho Arai, Naoto Yabuki, Sei Morikawa, Satoru Masubuchi (Univ. of Tokyo), Keiji Ueno (Saitama Univ.) SDM2015-123 |
Recent advances in transfer techniques of atomic layers have enabled one to fabricate van der Waals junctions of two-dim... [more] |
SDM2015-123 pp.13-16 |
ICD, SDM |
2014-08-04 13:05 |
Hokkaido |
Hokkaido Univ., Multimedia Education Bldg. |
[Invited Talk]
Research progress in steep slope devices and technologies to enhance ON current in TFETs Takahiro Mori, Yukinori Morita, Shinji Migita, Wataru Mizubayashi, Koichi Fukuda, Noriyuki Miyata, Tetsuji Yasuda, Meishoku Masahara, Hiroyuki Ota (AIST) SDM2014-67 ICD2014-36 |
Steep slope devices (SSDs) have attracted because of the increase demand for low-power devices. This paper reviews recen... [more] |
SDM2014-67 ICD2014-36 pp.29-34 |
SDM |
2013-11-15 13:25 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Quantum transport simulation of ultrasmall III-V MOSFETs using Wigner Monte Carlo approach Masaki Ohmori, Shunsuke Koba, Yosuke Maegawa (Kobe Univ.), Hideaki Tsuchiya (Kobe Univ./JST), Yoshinari Kamakura, Nobuya Mori (Osaka Univ./JST), Matsuto Ogawa (Kobe Univ.) SDM2013-111 |
In this study, the impact of source-drain (SD) direct tunneling in III-V metal-oxide-semiconductor field-effect transist... [more] |
SDM2013-111 pp.65-70 |
SDM, ICD |
2013-08-01 09:25 |
Ishikawa |
Kanazawa University |
Performance Enhancement of Tunnel Field-Effect Transistors by Synthetic Electric Field Effect Yukinori Morita, Takahiro Mori, Shinji Migita, Wataru Mizubayashi, Akihito Tanabe, Koichi Fukuda, Kazuhiko Endo, Takashi Matsukawa, Shin-ichi O'uchi, Yongxun Liu, Meishoku Masahara, Hiroyuki Ota (AIST) SDM2013-66 ICD2013-48 |
A synthetic electric field effect to enhance the performance of tunnel field-effect transistors (TFETs) is proposed. The... [more] |
SDM2013-66 ICD2013-48 pp.7-12 |
SDM, ED (Workshop) |
2012-06-27 13:15 |
Okinawa |
Okinawa Seinen-kaikan |
Investigation and Optimization of the n-channel and p-channel L-shaped Tunneling Field-Effect Transistors Sang Wan Kim (Seoul National Univ.), Woo Young Choi (Sogang Univ.), Min-Chul Sun, Hyun Woo Kim, Byung-Gook Park (Seoul National Univ.) |
Tunneling field-effect transistors (TFETs) have been regarded as next-generation ultra-low power devices thanks to low o... [more] |
|
SDM, ED (Workshop) |
2012-06-28 10:40 |
Okinawa |
Okinawa Seinen-kaikan |
[Poster Presentation]
Rigorous Design for Gate-Dielectric and n-Pocket Region of Tunneling Field-Effect Transistors and Its High Performances. Jae Hwa Seo, Jae Sung Lee, Yun Soo Park, Jung-Hee Lee, In Man Kang (Kyunpook Nat'l Univ.) |
A gate-all-around tunneling field-effect transistor (GAA TFET) with high-k gate-dielectric and n-pocket layer is demonst... [more] |
|
ED, SDM |
2012-02-07 16:55 |
Hokkaido |
|
Light emission from Silicon quantum-well by tunneling current injection Jinichiro Noborisaka, Katsuhiko Nishiguchi, Hiroyuki Kageshima, Akira Fujiwara (NTT BRL) ED2011-149 SDM2011-166 |
We demonstrated electron tunneling spectroscopy of thin silicon-on-insulator (SOI) metal-oxide-semiconductor field-effec... [more] |
ED2011-149 SDM2011-166 pp.41-46 |
SDM |
2010-11-12 15:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Design Feasibility of Si Wire GAA MOSFET
-- Analytical model for the design guideline -- Shunsuke Nakano, Yasuhisa Omura (Kansai Univ.) SDM2010-184 |
This paper proposes a simple model to examine the design feasibility of Si wire gate-all-around (GAA) metal-oxide-semico... [more] |
SDM2010-184 pp.71-76 |
ED, SDM |
2008-01-30 14:45 |
Hokkaido |
|
Design of dopant-induced quantum dot arrays in silicon nanostructures for single-electron transfer Daniel Moraru, Daisuke Nagata, Kiyohito Yokoi, Hiroya Ikeda, Michiharu Tabe (Shizuoka Univ.) ED2007-240 SDM2007-251 |
Randomly distributed dopants in the channel of silicon-on-insulator (SOI) field-effect transistors (FETs) can introduce ... [more] |
ED2007-240 SDM2007-251 pp.17-22 |
SDM |
2007-06-07 15:30 |
Hiroshima |
Hiroshima Univ. ( Faculty Club) |
Proposal of the mechanism of multi-electron injection into floating gates embeded in SiO2 Yukihiro Takada, Masakazu Muraguchi, Kenji Shiraishi (Univ. of Tsukuba) SDM2007-35 |
The use of silicon-quantum-dots (Si-QDs) as a floating gate in metal-oxide-semiconductor field-effect-transistors (MOSFE... [more] |
SDM2007-35 pp.23-26 |