Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
DC |
2023-12-08 13:50 |
Nagasaki |
ARKAS SASEBO (Primary: On-site, Secondary: Online) |
A Multiple Target Seed Generation Method for Random Pattern Resistant Faults Using a Compatible Fault Set on Built-in Self Test Takanobu Sone, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.), Masayuki Arai (Nihon Univ.) DC2023-88 |
In recent years, with high density of very large-scale integrated circuits, it has become impractical to store a large n... [more] |
DC2023-88 pp.7-12 |
DC |
2023-02-28 15:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg (Primary: On-site, Secondary: Online) |
A Seed Generation Method for Multiple Random Pattern Resistant Transition Faults for BIST Yangling Xu, Rei Miura, Toshinori Hosokawa (Nihon Univ), Masayoshi Yoshimura (KSU) DC2022-89 |
With shrinking feature sizes, growing clock frequencies, and decreasing power supply voltage, modern very large integrat... [more] |
DC2022-89 pp.39-44 |
DC |
2022-03-01 14:45 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. (Primary: On-site, Secondary: Online) |
SAT-based LFSR Seed Generation for Delay Fault BIST Kotaro Iwamoto, Satoshi Ohtake (Oita Univ.) DC2021-74 |
So far, a one-pass LFSR seed generation method for delay fault BIST has been proposed. The method directly generates see... [more] |
DC2021-74 pp.57-62 |
PRMU, BioX |
2018-03-19 16:30 |
Tokyo |
|
Generating Handwritten Character Clones Based on Shape Model Estimation by Collaborating Filtering Eiji Miyazaki, Kazuaki Nakamura, Naoko Nitta, Noboru Babaguchi (Osaka Univ.) BioX2017-73 PRMU2017-209 |
In this paper, we focus on methods for generating clone images of handwritten characters resembling a target writer's ac... [more] |
BioX2017-73 PRMU2017-209 pp.219-224 |
SDM |
2018-02-08 16:10 |
Tokyo |
Tokyo Univ. |
[Invited Talk]
Next Generation Circuit Fabrication by Molecular Bonding Technology Akihiko Happoya (Toshiba), Kunio Mori (SCL) SDM2017-103 |
We have developed a molecular bonding technology that forms a layer of molecules on the surface of the adherends and pro... [more] |
SDM2017-103 pp.31-34 |
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2017-11-06 14:30 |
Kumamoto |
Kumamoto-Kenminkouryukan Parea |
A Method of LFSR Seed Generation for Improving Quality of Delay Fault BIST Kyonosuke Watanabe, Satoshi Ohtake (Oita Univ.) VLD2017-35 DC2017-41 |
With the miniaturization and high speed of large scale integrated circuits, it has become important to test delay faults... [more] |
VLD2017-35 DC2017-41 pp.49-54 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-03 14:10 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
An approach to LFSR/MISR seed generation for delay fault BIST Daichi Shimazu, Satishi Ohtake (Oita Univ.) VLD2015-70 DC2015-66 |
In this paper, we propose a method of LFSR/MISR seed generation for delay fault BIST.
A widely used conventional way to... [more] |
VLD2015-70 DC2015-66 pp.213-218 |
DC |
2015-02-13 15:20 |
Tokyo |
Kikai-Shinko-Kaikan Bldg |
A Method of LFSR Seed Generation for Hierarchical BIST Kosuke Sawaki, Satoshi Ohtake (Oita Univ.) DC2014-85 |
A linear feedback shift register (LFSR) is used as a test pattern generator of built-in self-test (BIST).
In BIST, alth... [more] |
DC2014-85 pp.43-48 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-29 08:55 |
Kagoshima |
|
A Method of LFSR Seed Generation for Delay Fault BIST Taro Honda, Satoshi Ohtake (Oita Univ.) VLD2013-92 DC2013-58 |
In this paper, we propose a method to generate LFSR seeds for delay fault BIST. A conventional way to generate seeds is ... [more] |
VLD2013-92 DC2013-58 pp.227-231 |
DC |
2013-06-21 14:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
A method of deterministic LFSR seed generation for scan-based BIST Takanori Moriyasu, Satoshi Ohtake (Oita Univ.) DC2013-11 |
This paper proposes a method of LFSR seed generation for LFSR reseeding of scan-based BIST of VLSI circuits. So far, a s... [more] |
DC2013-11 pp.7-12 |