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 Results 1 - 6 of 6  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM, ICD, ITE-IST [detail] 2021-08-18
13:45		 Online Online Performance Evaluation of Serial-Parallel Montgomery Multipliers for RNS
Hiroyuki Tsubouchi, Mitsunaga Kinjo, Katsuhiko Shimabukuro (Univ. of the Ryukyus) SDM2021-40 ICD2021-11		 Modulo operations are required in RNS (Residue Number System) which enables to perform highly parallel computation. Also... [more] SDM2021-40 ICD2021-11
pp.54-57
HWS, ICD [detail] 2019-11-01
14:15		 Osaka DNP Namba SS Bld. A Design of Isogeny-Based Cryptographic Hardware Architecture Using Residue Number System
Shuto Funakoshi, Rei Ueno, Naofumi Homma (Tohoku Univ.) HWS2019-60 ICD2019-21		 In this paper, we will propose an efficient hardware architecture of isogeny-based cryptography. The proposed architectu... [more] HWS2019-60 ICD2019-21
pp.19-24
HWS 2018-04-13
13:55		 Fukuoka   Energy Evaluation of FPGA Pairing Implementation with Pipeline Modular Multiplier
Yusuke Nagahama, Daisuke Fujimoto, Junichi Sakamoto, Tsutomu Matsumoto (YNU) HWS2018-5		 Energy consumption and latency are important features of dedicated hardware bilinear pairing calculators. However publi... [more] HWS2018-5
pp.23-28
IT, ISEC, WBS 2016-03-10
14:30		 Tokyo The University of Electro-Communications A Multiplier Architecture for Finite Field of 254bit-Prime Square Order Based on Pipelined 32bit Montgomery Multipliers
Yusuke Nagahama, Daisuke Fujimoto, Tsutomu Matsumoto (YNU) IT2015-116 ISEC2015-75 WBS2015-99		 Bilinear Pairing is a major tool to realize advanced cryptographic functionality such as searchable encryption, aggregat... [more] IT2015-116 ISEC2015-75 WBS2015-99
pp.95-100
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2015-12-01
13:10		 Nagasaki Nagasaki Kinro Fukushi Kaikan Implementation of ECDSA Using Gate-level Pipelined Self-synchronous Circuit
Masato Tamura, Makoto Ikeda (Univ. of Tokyo) VLD2015-39 DC2015-35		 In this paper, we investigated the implementation method of elliptic curve digital signature algorithm using self-synchr... [more] VLD2015-39 DC2015-35
pp.7-12
CAS, SIP, VLD 2007-06-22
13:00		 Hokkaido Hokkaido Tokai Univ. （Sapporo) Scalable Dual-Radix Unified Montgomery Multiplier in GF(p) and GF(2n)
Kazuyuki Tanimura, Ryuta Nara, Shunitsu Kohara, Youhua Shi, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) CAS2007-26 VLD2007-42 SIP2007-56		 Modular multiplication is the dominant arithmetic operation in elliptic curve cryptography (ECC), which is one of public... [more] CAS2007-26 VLD2007-42 SIP2007-56
pp.43-48
 Results 1 - 6 of 6  /   
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