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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 7 of 7  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, RECONF, ICD, IPSJ-SLDM
(Joint) [detail]
2021-12-02
10:35
Online Online Calculation method of correctly rounded exponential function on an FPGA
Takuya Haraguchi, Naofumi Takagi (Kyoto Univ.) VLD2021-35 ICD2021-45 DC2021-41 RECONF2021-43
We propose the FPGA-oriented calculation method of correctly rounded exponential function, exp, which is one of the func... [more] VLD2021-35 ICD2021-45 DC2021-41 RECONF2021-43
pp.105-110
IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] 2020-01-24
13:30
Kanagawa Raiosha, Hiyoshi Campus, Keio University An FPGA implementation of arc-sine high-radix CORDIC algorithm
Hiroshi Matsuoka, Naofumi Takagi (Kyoto Univ.), Kazuyoshi Takagi (Mie Univ.) VLD2019-86 CPSY2019-84 RECONF2019-76
We consider the realization of the circuit on the FPGA based on the high radix CORDIC algorithm that we proposed for cal... [more] VLD2019-86 CPSY2019-84 RECONF2019-76
pp.193-197
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2019-11-14
15:05
Ehime Ehime Prefecture Gender Equality Center High-Radix CORDIC algorithm for calculating arc-sine and arc-cosine
Hiroshi Matsuoka, Naofumi Takagi (Kyoto Univ.) VLD2019-42 DC2019-66
We propose high-radix CORDIC algorithm that calculate arc-sine and arc-cosine. CORDIC is used to calculating triangular ... [more] VLD2019-42 DC2019-66
pp.109-113
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2017-11-07
13:00
Kumamoto Kumamoto-Kenminkouryukan Parea Calculation method of exponential function on FPGAs using high-radix STL method
Yasufumi Fujiwara, Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ.) RECONF2017-46
We propose the calculation method of double precision floating point exponential function for FPGA with correct rounding... [more] RECONF2017-46
pp.55-59
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2015-12-01
13:10
Nagasaki Nagasaki Kinro Fukushi Kaikan Implementation of ECDSA Using Gate-level Pipelined Self-synchronous Circuit
Masato Tamura, Makoto Ikeda (Univ. of Tokyo) VLD2015-39 DC2015-35
In this paper, we investigated the implementation method of elliptic curve digital signature algorithm using self-synchr... [more] VLD2015-39 DC2015-35
pp.7-12
CPSY, VLD, RECONF, IPSJ-SLDM [detail] 2013-01-17
11:25
Kanagawa   Low latency network topology using multiple links at each host
Ryuta Kawano (Keio Univ.), Ikki Fujiwara (NII), Hiroki Matsutani, Hideharu Amano (Keio Univ.), Michihiro Koibuchi (NII) VLD2012-128 CPSY2012-77 RECONF2012-82
End-to-end network latency has become an important issue for parallel application on large-scale High Performance Comput... [more] VLD2012-128 CPSY2012-77 RECONF2012-82
pp.123-128
ISEC, IPSJ-CSEC 2004-07-20
10:45
Tokushima Tokushima Univ. A Hardware Organization of Modular Multiplication for RSA Cryptosystem
Yi Ge, Takao Sakurai (Univ. of Tokyo), Koki Abe (UEC), Shuichi Sakai (Univ. of Tokyo)
Hardware organized modular multiplication based on division algorithm is one of the effective methods used for RSA encry... [more] ISEC2004-15
pp.15-20
 Results 1 - 7 of 7  /   
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