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Committee Date Time Place Paper Title / Authors Abstract Paper #
EMM 2015-03-12
16:00		 Okinawa   [Poster Presentation] Generation Methods of Secret Sharing QR Codes
Masaki Kuramoto (Osaka Univ.), Kazuhiro Kono (Kansai Univ.), Yoshimichi Ito (Osaka Electro-Communication Univ.), Noboru Babaguchi (Osaka Univ.) EMM2014-92		 This paper proposes methods for generating a set of multiple QR codes, in which each QR code contains a share of secret ... [more] EMM2014-92
pp.91-96
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2013-11-27
14:05		 Kagoshima   Improved via programmable structured ASIC VPEX3S -- Improvement of basic logic element to improve operation speed --
Taku Otani, Ryohei Hori (Ritsumeikan Univ.), Masaya Yoshikawa (Meijo Univ.), Takeshi Fujino (Ritsumeikan Univ.) VLD2013-70 DC2013-36		 We have been studying via programmable structured ASIC architecture “VPEX3(Via Programmable Logic using Exclusive-OR Arr... [more] VLD2013-70 DC2013-36
pp.75-80
IT 2012-09-28
08:45		 Gunma Kusatsu Seminar House Optimization of Exclusive-OR Operations in Parallel Bit Encoding and Parallel Bit Decoding for Hamming Code
Reiya Ooshima, Ken-ichi Iwata (Univ. of Fukui) IT2012-35		 The paper consider an optimization of the amount of exclusive-or operations in the parallel bit encoding or the parallel... [more] IT2012-35
pp.25-30
VLD 2009-03-12
09:15		 Okinawa   Chip evaluation and implimentation of DES encryption using via-programmable-device VPEX
Masahide Kawarasaki, Tomohiro Nishimoto, Yuuichi Kokushou, Kazuma Kitamura, Shouta Yamada (Ritsumeikan Univ.), Masaya Yoshikawa (Meijyou Univ.), Takeshi Fujino (Ritsumeikan Univ.) VLD2008-139		 We have been studied the via-programmable-device VPEX (Via Programmable logic using EXclusive or array) whose logic elem... [more] VLD2008-139
pp.77-82
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