Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] |
2018-03-08 13:55 |
Shimane |
Okinoshima Bunka-Kaikan Bldg. |
CPSY2017-146 DC2017-102 |
Resistive RAM (ReRAM) is one of the most promising memory technologies due to its property such as high density, low-pow... [more] |
CPSY2017-146 DC2017-102 pp.257-262 |
RCS, SAT (Joint) |
2017-08-17 13:35 |
Niigata |
Niigata Univ. |
[Invited Lecture]
Error Correction Code for Future Communication Systems Takahiko Nakamura, Hideo Yoshida, Takashi Sugihara (Mitsubishi Electric) SAT2017-24 RCS2017-154 |
Error correction codes are mainly applied to communication systems. From 1980s, satellite communication was main applica... [more] |
SAT2017-24 RCS2017-154 pp.25-30(SAT), pp.67-72(RCS) |
WBS, MICT |
2017-07-13 13:45 |
Shizuoka |
ACT CITY |
[Poster Presentation]
Effect of Framed-DOOK using Block Error Correcting Code in Optical Wireless Channel Ran Sun, Hiromasa Habuchi, Yusuke Kozawa (Ibaraki Univ.) WBS2017-14 MICT2017-16 |
For reducing the influence of background noise and inhibiting synchronization slip in optical wireless communication, fr... [more] |
WBS2017-14 MICT2017-16 pp.35-38 |
DC, SS |
2016-10-27 13:40 |
Shiga |
Hikone Kinro-Fukushi Kaikan Bldg. |
Single Limited-Magnitude Error Correcting Codes Using Integer Residue Ring of Large Order Shohei Kotaki, Masato Kitakami (Chiba Univ.) SS2016-22 DC2016-24 |
Multilevel memories, which store multiple bit information within a memory cell,
cause specific errors which mostly shif... [more] |
SS2016-22 DC2016-24 pp.25-29 |
IT |
2016-09-02 10:00 |
Saga |
New Heartpia |
On Error Correction Capability of Irregular LDPC Codes under the Bit-Flipping Decoding Algorithm Hiroto Tamiya (Kobe Univ.), Masanori Hirotomo (Saga Univ.), Masakatu Morii (Kobe Univ.) IT2016-35 |
The error-correction capability of LDPC codes for iterative decoding algorithms have been investigated. However, it is d... [more] |
IT2016-35 pp.7-12 |
PRMU, IBISML, IPSJ-CVIM [detail] |
2014-09-01 16:30 |
Ibaraki |
|
Dimentionality Reduction Methods Using Error Correcting Codes for Feature Extraction Wataru Matsumoto, Genta Yoshimura, Takashi Yamazaki (Mitsubishi Electric) PRMU2014-46 IBISML2014-27 |
For various media retrieval and recognition applications, we consider the feature extraction vector compressed by a spar... [more] |
PRMU2014-46 IBISML2014-27 pp.81-84 |
IT |
2014-05-16 13:25 |
Oita |
Beppu International Convention Center |
A method of parallel processing of syndromes to decode primitive BCH codes Ken-ichi Iwata, Reiya Ooshima (Univ. of Fukui) IT2014-5 |
We consider numbers of addition and multiplication operations to calculate an error syndrome for q-ary primitive BCH cod... [more] |
IT2014-5 pp.23-26 |
DC |
2013-10-24 15:25 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
A Class of q-Ary Unidirectional Error Correcting Codes for MLC NAND Flash Memories Shohei Kotaki, Masato Kitakami (Chiba Univ.) DC2013-25 |
Error correcting codes (ECCs) are essential techniques to ensure reliability of NAND Flash Memories. As typical error so... [more] |
DC2013-25 pp.25-30 |
OCS, CS (Joint) |
2013-01-24 14:20 |
Ehime |
Ehime Univ. |
Experimental Demonstration of Triple-Concatenated Forward Error Correction for 40Gbps Coherent Optical Communication Systems Kiyoshi Onohara, Yoshikuni Miyata, Kenya Sugihara, Susumu Hirano, Kazuo Kubo, Toshiyuki Ichikawa, Kazuumi Koguchi, Wataru Matsumoto, Hideo Yoshida, Takashi Mizuochi (Mitsubishi Electric Corporation) OCS2012-87 |
High-speed and real-time digital signal processing technology enabled practical coherent optical communication systems b... [more] |
OCS2012-87 pp.13-18 |
SIS |
2012-12-13 14:10 |
Chiba |
Nihon University Tsudanuma Campus |
Performance of Unique Word Detection Method in Wireless Communications Idhsada Sa-nguanwongthong, Mikado Yotsuya, Shoichiro Yamasaki, Tomoko K. Matsushima (Polytechnic Univ.), Hirokazu Tanaka (Toshiba) SIS2012-36 |
Transmitted information bit sequence in communications is often divided into short bit sequences called packets. Each pa... [more] |
SIS2012-36 pp.35-38 |
SAT |
2011-12-12 09:25 |
Aichi |
Nagoya University |
A Computationally Efficient Early Stopping Method for DVB-S2 LDPC Decoder Gwan Seok Jang (UST-ETRI), In Ki Lee, Dae Ig Chang, Deock Gil Oh (ETRI) SAT2011-40 |
Satellite communication requires powerful forward error correction scheme because of long transmission delay. Thus, the ... [more] |
SAT2011-40 pp.7-12 |
IBISML |
2010-11-04 15:00 |
Tokyo |
IIS, Univ. of Tokyo |
[Poster Presentation]
Quantum Error Correction with Non-Binary LDPC Codes Kenta Kasai (Tokyo Inst. of Tech.), Manabu Hagiwara (AIST), Hideki Imai (Chuo Univ.), Kohichi Sakaniwa (Tokyo Inst. of Tech.) IBISML2010-77 |
Quantum error correction is used in quantum computing and quantum communications to protect quantum information from qua... [more] |
IBISML2010-77 pp.135-145 |
VLD, IPSJ-SLDM |
2010-05-20 10:25 |
Fukuoka |
Kitakyushu International Conference Center |
Implementation of error correction method on small area and low power consumption processor for the capsular detrusor pressure measurement system Hiroki Ohsawa, Tomohiro Kondo, Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai (Osaka Univ.) VLD2010-6 |
Our research group is developing a capsular detrusor pressure measurement system.
In this system, communication errors ... [more] |
VLD2010-6 pp.49-54 |
IT, ISEC, WBS |
2010-03-04 11:40 |
Nagano |
Nagano-Engineering Campus, Shinshu University |
1-State Error-Trellis Decoding of LDPC Convolutional Codes Based on Circulant Matrices Masato Tajima, Koji Okino, Takashi Miyagoshi (Univ. of Toyama) IT2009-95 ISEC2009-103 WBS2009-74 |
We consider the decoding of convolutional codes using an error trellis constructed based on a submatrix of a given check... [more] |
IT2009-95 ISEC2009-103 WBS2009-74 pp.153-158 |
IT, ISEC, WBS |
2010-03-05 15:20 |
Nagano |
Nagano-Engineering Campus, Shinshu University |
New Classes of Public Key Cryptosystems Constructed Based on Error-Correcting Codes and Probabilistic Structure Masao Kasahara (Osaka Gakuin Univ.) IT2009-126 ISEC2009-134 WBS2009-105 |
In this paper, we propose a new method for constructing the public-key cryptosystems based on the error-correcting code ... [more] |
IT2009-126 ISEC2009-134 WBS2009-105 pp.353-360 |
ET |
2009-12-11 14:30 |
Okinawa |
Univ. of the Ryukyus |
A customizable system for automatically generating error-correction exercises in algorithm learning Kei Fujiwara (Osaka Univ.), Hiroyuki Nagataki (Okayama Univ.), Fukuhito Ooshita, Hirotsugu Kakugawa, Toshimitsu Masuzawa (Osaka Univ.) ET2009-86 |
In this study, we propose a customizable system for automatically generating ``error-correction exercises" in algorithm ... [more] |
ET2009-86 pp.199-204 |
WBS, IT, ISEC |
2009-03-09 10:50 |
Hokkaido |
Hakodate Mirai Univ. |
Error-Trellis State Complexity of LDPC Convolutional Codes Based on Circulant Matrices Masato Tajima, Koji Okino, Takashi Miyagoshi (Univ. of Toyama) IT2008-61 ISEC2008-119 WBS2008-74 |
Let H(D) be the parity-check matrix of an LDPC convolutional code corresponding to the parity-check matrix H of a quasi-... [more] |
IT2008-61 ISEC2008-119 WBS2008-74 pp.109-116 |
RCS, AN, MoNA, SR (Joint) |
2009-03-06 09:20 |
Kanagawa |
YRP |
Soft-Decision Decoding of Block Codes
-- A Factor-Graph Approach -- Yongmei Wei, Kambiz Homayounfar (PHYBIT) RCS2008-270 |
Linear block codes capable of correcting a burst of bit errors are desirable for protection of control plane data in mob... [more] |
RCS2008-270 pp.343-348 |
OCS |
2009-02-03 09:45 |
Shizuoka |
|
A Study on Advanced FEC for LDPC Codes with Soft-Decision Decoding Takashi Mizuochi, Yoshikuni Miyata, Toshiyuki Ichikawa, Yoshiaki Konishi, Tatsuya Kobayashi, Tokoka Inoue, Kiyoshi Onohara, Soichiro Kametani, Kazuo Kubo, Hideo Yoshida, Katsuhiro Shimizu, Hiroshi Ichibangase (Mitsubishi Electric Co.) OCS2008-118 |
Novel and strong forward error correction (FEC) for 100Gb/s optical transport networks is presented. Comparing with exis... [more] |
OCS2008-118 pp.67-72 |
CS |
2008-11-06 10:35 |
Hokkaido |
Hotel Tsturuga, Akan, Hokkaido |
A Basic Study and Evaluations of Parallelized Low-density Generator-matrices Codes Masahiko Kitamura, Daisuke Shirai, Tatsuya Fujii (NTT) CS2008-30 |
This paper describes the parallelized decoding of low-density generator-matrices codes for high through rate. LDGM is a ... [more] |
CS2008-30 pp.31-36 |