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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| HWS, VLD [detail] | 2020-03-05 10:30 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
Motor Current Signature Analysis Based On-Line Fault Detection of DC Motor Naoki Osako (Kwansei Gakuin Univ.), Hiroyuki Kanbara (ASTEM), Nagisa Ishiura (Kwansei Gakuin Univ.)  VLD2019-111 HWS2019-84 |
This article presents a method for online detection of DC motors' fault based on current signature analysis. While cu... [more] |
VLD2019-111 HWS2019-84 pp.101-106 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-23 11:50 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | Binary Synthesis from RISC-V Executables Shoki Hamana, Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2019-71 CPSY2019-69 RECONF2019-61 |
This article presents a method of synthesizing hardware from RISC-V binary codes. RISC-V is an open source instruction s... [more] | VLD2019-71 CPSY2019-69 RECONF2019-61 pp.111-115 |
| VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2019-11-15 16:10 |
Ehime | Ehime Prefecture Gender Equality Center | Low Latency Interrupt Handling Scheme By Using Interrupt Wake-Up Mechanism Ryo Wada, Nobuyuki Yamasaki (Keio Univ.) CPSY2019-50 |
Recently, embedded real-time systems used in spacecraft and automobiles have become increasingly complex and are require... [more] | CPSY2019-50 pp.71-76 |
| KBSE, SC | 2019-11-08 15:40 |
Nagano | Shinshu University | A Case-study for Developpment and Verification of an Embedded System Kozo Okano, Shinpei Ogata, Miki Natsume (Shinshu Univ.) KBSE2019-30 SC2019-27 |
Through a development of an embedded system and design verification, we report on the issues and workload when novice en... [more] | KBSE2019-30 SC2019-27 pp.41-46 |
| ASN, MoNA, IPSJ-MBL, IPSJ-UBI [detail] | 2019-03-04 11:15 |
Tokyo | The University of Tokyo, Komaba Campus | Abstraction of Emulation for Sensor IoT Devices Futoshi Hirose (JAIST), Tsubasa Yumura (NICT), Yoichi Shinoda (JAIST) ASN2018-104 |
IoT (Internet of Things) makes it easy to measure and collect a wide range of environmental information. IoT devices eq... [more] | ASN2018-104 pp.49-54 |
| KBSE, SS, IPSJ-SE [detail] | 2018-07-18 14:25 |
Hokkaido | A Study of Safety Updating Functionalities for Embedded Systems Shinya Tsuchida, Hiroyuki Nakagawa, Tatsuhiro Tsuchiya (Osaka Univ) SS2018-8 KBSE2018-18 |
Software evolution for embedded systems is a necessary process in software development. In this paper, we update a progr... [more] | SS2018-8 KBSE2018-18 pp.43-48 |
|
| KBSE | 2018-01-25 13:35 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Applicability of a Framework for Updating Functions Based on the MAPE Loop Mechanism Shinya Tsuchida, Hiroyuki Nakagawa, Tatsuhiro Tsuchiya (Osaka Univ) KBSE2017-32 |
Software evolution for embedded systems is a necessary process in software development. In this paper, we construct a pr... [more] | KBSE2017-32 pp.1-6 |
| SS, MSS | 2018-01-18 15:05 |
Hiroshima | Deadline Assignment Optimization Method Using Extended Time Petri Nets for Real-Time Multitask Distributed Systems Sharing Processors with EDF Scheduling Reon Matsuoka, Akio Nakata (Hiroshima City Univ.) MSS2017-56 SS2017-43 |
In the development of embedded software which requires high reliability satisfaction of hard requirements for both compu... [more] | MSS2017-56 SS2017-43 pp.53-58 |
|
| IPSJ-ARC, VLD, CPSY, RECONF, IPSJ-SLDM [detail] | 2018-01-18 17:00 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | Distributed Memory Architecture for High-Level Synthesis from Erlang Kagumi Azuma, Shoki Hamana, Hidekazu Wakabayashi, Nagisa Ishiura (Kwansei Gakuin Univ.), Nobuaki Yoshida, Hiroyuki Kanbara (ASTEM) VLD2017-75 CPSY2017-119 RECONF2017-63 |
This paper presents a distributed memory architecture for dedicated hardware automatically synthesized from Erlang prog... [more] |
VLD2017-75 CPSY2017-119 RECONF2017-63 pp.77-82 |
| SS, DC | 2017-10-19 17:35 |
Kochi | Kochi City Culture-plaza CUL-PORT | An Empirical Study of Correction Candidates in a Requirements Specification Document for an Embbeded System Ryota Yamamoto, Norihiro Yoshida, Hiroaki Takada (Nagoya Univ.) SS2017-29 DC2017-28 |
Software developers tend to write incorrect/ambiguous expressions in a document. Incorrect/ambiguous expressions often c... [more] | SS2017-29 DC2017-28 pp.49-54 |
| SS | 2017-03-10 11:35 |
Okinawa | Approximation of Multitask System Specification by Task Merging for Efficiency Improvement of Performance Verification Kazuma Hashimoto, Akio Nakata (Hiroshima City Univ.) SS2016-79 |
In the development of embedded software which requires high reliability satisfaction and performance of hard requirement... [more] | SS2016-79 pp.115-120 |
|
| KBSE | 2017-01-24 10:00 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | A GSN development approach for Feature models Hiroyuki Utsunomiya, Shuichiro Yamamoto (Nagoya Univ.) KBSE2016-34 |
The feature model was known to reuse components for developing similar embedded software. However, the assurance method ... [more] | KBSE2016-34 pp.19-24 |
| RECONF | 2016-05-19 17:30 |
Kanagawa | FUJITSU LAB. | [Invited Talk]
Overviews on key technologies to substantialize 'IoT society' Toshihiro Matsui, Hisashi Sekine, Hideki Hayashi, Hiroaki Ohkubo, Hirotaka Sunaguchi, Naoyuki Matsuo, Yoshitatsu Sato (NEDO TSC) RECONF2016-16 |
Regarding non-volatile memories, sensors, embedded software, and cyber security as the key components in the coming IoT ... [more] | RECONF2016-16 pp.77-82 |
| KBSE | 2016-03-04 18:00 |
Oita | A Study of Layer Interaction Diagram for Context-Oriented Technique Daisuke Moriya, Eri Ogawa, Hiroki Kamijo, Harumi Watanabe (Tokai Univ) KBSE2015-70 |
The article proposes a Layer Interaction Diagram. That diagram is a part of Context-Oriented software development that i... [more] | KBSE2015-70 pp.125-130 |
|
| VLD | 2016-02-29 15:00 |
Okinawa | Okinawa Seinen Kaikan | High-Level Synthesis of Embedded Systems Controller from Erlang Hinata Takabeyashi, Nagisa Ishiura, Kagumi Azuma (Kwansei Gakuin Univ), Nobuaki Yoshida, Hiroyuki Kanbara (ASTEM) VLD2015-114 |
This article presents a method of specifying the behavior of embedded systems' control by a subset of Erlang and synthes... [more] | VLD2015-114 pp.19-24 |
| SS, MSS | 2016-01-26 11:55 |
Ishikawa | Shiinoki-Geihin-Kan | Modeling and Performance Verification of Embedded Software Sharing Resources with Least Laxity First Schedulers Using Extended Time Petri Nets Takafumi Nakamura, Akio Nakata (Hiroshima City Univ.) MSS2015-59 SS2015-68 |
In the development of embedded software which requires high reliability satisfaction of hard requirements for both compu... [more] | MSS2015-59 SS2015-68 pp.135-140 |
| SIS, IPSJ-AVM | 2015-09-03 13:10 |
Osaka | Kansai Univ. | [Tutorial Lecture]
Side-channel Attack on Cryptographic Embedded Systems and Its Countermeasure Naofumi Homma (Tohoku Univ.) SIS2015-18 |
Cryptography is an indispensable technology to construct safe and secure information-driven society, and systems includi... [more] | SIS2015-18 pp.19-24 |
| MSS, CAS, SIP, VLD | 2015-06-18 10:10 |
Hokkaido | Otaru University of Commerce | Software model checking of embedded assembly programs by symbolic execution Ryosuke Konoshita, Satoshi Yamane (Kanazawa Univ.) CAS2015-15 VLD2015-22 SIP2015-46 MSS2015-15 |
We have developed a software verification system for embedded assembly programs. It dynamically generates a model by th... [more] |
CAS2015-15 VLD2015-22 SIP2015-46 MSS2015-15 pp.77-81 |
| SS | 2015-05-11 16:30 |
Kumamoto | Kumamoto University | Modeling and Performance Verification of Embedded Software in Multiprocessor Environment Using Extended Time Petri Nets Takafumi Nakamura, Akio Nakata (Hiroshima City Univ.) SS2015-7 |
In the development of embedded software which requires high reliability satisfaction of hard requirements for both compu... [more] | SS2015-7 pp.33-37 |
| SS | 2015-05-12 08:45 |
Kumamoto | Kumamoto University | Coding Pattern Detection for C Programs Using Pattern Mining Technique Yuta Nakamura, Eunjong Choi (Osaka Univ.), Norihiro Yoshida (Nagoya Univ.), Shusuke Haruna, Katsuro Inoue (Osaka Univ.) SS2015-9 |
Coding pattern is an idiomatic code fragment that distributes in modules. It can be used for finding bugs because it imp... [more] | SS2015-9 pp.41-46 |
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