IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 4 of 4  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
CPSY, DC, IPSJ-ARC
(Joint) [detail]
2015-08-05
14:30
Oita B-Con Plaza (Beppu) Efficient Thread Control Method for Parallel Loop Processing by Dynamic Binary Translation
Hiroyuki Obuchi, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) CPSY2015-29
In order to effectively utilize the performance of multicore processors spreading commonly at present, it is an importan... [more] CPSY2015-29
pp.155-160
CPSY, DC
(Joint)
2014-07-30
17:25
Niigata Toki Messe, Niigata Implementation of Path Profiler for Enabling Analysis of Data Dependencies Between Program Execution Paths
Kazuki Ohshima, Kanemitsu Ootsu, Takanobu Baba, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) CPSY2014-44
In present day, various techniques are required for realizing effective parallel processing according to multi-core proc... [more] CPSY2014-44
pp.203-208
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2013-11-28
09:20
Kagoshima   Function-Level Profiling for Embedded Software with QEMU
Tran Van Dung, Ittetsu Taniguchi (Ritsumeikan Univ.), Takuji Hieda (Kyushu Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2013-78 DC2013-44
Function-level profiling is crucial for optimized embedded software which needs to have resource constraint, low level p... [more] VLD2013-78 DC2013-44
pp.125-128
DC, CPSY
(Joint)
2013-08-02
14:30
Fukuoka Kitakyushu-Kokusai-Kaigijyo Reduction of Runtime Overhead in Automated Parallel Processing System using Valgrind
Takayuki Hoshi, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) CPSY2013-23
In order to efficiently utilize the performance of multicore processors, thread level parallel processing is indispensab... [more] CPSY2013-23
pp.79-84
 Results 1 - 4 of 4  /   
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan