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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 48  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
ITS, WBS, RCC 2023-12-21
09:50
Okinawa
(Primary: On-site, Secondary: Online)
Online Optimization of Pickup and Delivery Problem Considering Demand Forecasting and Delivery Delays
Ryo Matsuoka, Koichi Kobayashi, Yuh Yamashita (Hokkaido Univ.) WBS2023-32 ITS2023-15 RCC2023-26
In this paper, we consider an online pickup and delivery problem. Online optimization is to solve the pickup and deliver... [more] WBS2023-32 ITS2023-15 RCC2023-26
pp.25-30
NS 2023-10-06
13:25
Hokkaido Hokkaidou University + Online
(Primary: On-site, Secondary: Online)
A Proposal of Prioritized Random Access Control with Maximum Aggregation of Frames with Delay Constraints in Wireless Sensor Networks
Risa Matsuda, Yosuke Tanigawa, Hideki Tode (OMU) NS2023-100
In wireless sensor networks, some data must be transmitted within permissible end-to-end delay. In carrier sense multipl... [more] NS2023-100
pp.140-144
RCC, ISEC, IT, WBS 2023-03-14
13:50
Yamaguchi
(Primary: On-site, Secondary: Online)
A Construction Method of Alphabetic Codes Allowing N-bit Decoding Delays
Daichi Ueda, Ken-ichi Iwata (Univ. of Fukui), Hirosuke Yamamoto (The Univ. of Tokyo) IT2022-102 ISEC2022-81 WBS2022-99 RCC2022-99
As an extension of the AIFV and AIFV-m codes that allow decoding delay, Sugiura, Kamamoto, and Moriya proposed the N-bit... [more] IT2022-102 ISEC2022-81 WBS2022-99 RCC2022-99
pp.218-223
IN, NS
(Joint)
2023-03-02
10:20
Okinawa Okinawa Convention Centre + Online
(Primary: On-site, Secondary: Online)
Competitive Service Chaining among Service Brokers in NFV Networks
Ryohei Kokura, Masahiro Sasabe, Shoji Kasahara (NAIST) NS2022-172
Running network functions as software on generic hardware is a promising technology called network functions virtualizat... [more] NS2022-172
pp.31-36
RISING
(3rd)
2022-10-31
15:00
Kyoto Kyoto Terrsa (Day 1), and Online (Day 2, 3) [Poster Presentation] On Competitive Service Chaining among Multiple Service Brokers in NFV Networks
Ryohei Kokura, Masahiro Sasabe, Shoji Kasahara (NAIST)
Running network functions as software on generic hardware is a promising technology called as network functions virtuali... [more]
COMP 2022-10-26
14:30
Fukuoka Kyusyu Univ. Nishijin Plaza Efficient Enumeration of Spanning Subgraphs in Planar Graphs with Edge Connectivity Constraints
Yasuaki Kobayashi (Hokkaido Univ.), Kazuhiro Kurita (Nagoya Univ.), Kunihiro Wasa (Hosei Univ.) COMP2022-17
In this paper, we address an efficient enumeration of spanning subgraphs in planar graphs with edge-connected constraint... [more] COMP2022-17
pp.21-28
NS 2022-10-07
09:30
Hokkaido Hokkaidou University + Online
(Primary: On-site, Secondary: Online)
A Selfish Service Chaining Scheme for Minimizing Service Path Delay in NFV Networks
Ryohei Kokura, Masahiro Sasabe, Shoji Kasahara (NAIST) NS2022-95
Network functions virtualization (NFV) can flexibly achieve various network services by running network functions as sof... [more] NS2022-95
pp.88-93
RCS, SIP, IT 2022-01-20
11:45
Online Online Packet Aggregation Scheme Considering Information Gathering Delay for WSN
Bounpasith Chaleunsouk, Koichi Adachi (UEC) IT2021-40 SIP2021-48 RCS2021-208
In recent years, with the development of IoT (Internet-of-Things), WSNs ( Wireless Sensor Networks) have permeated vario... [more] IT2021-40 SIP2021-48 RCS2021-208
pp.69-74
IN, NS
(Joint)
2019-03-05
13:30
Okinawa Okinawa Convention Center Gateway Placement Optimization under Allowable Delay Constraint in HANETs: Considering Link Disruption
Taichi Miya (Tokyo Tech), Kohta Ohshima (TUMSAT), Yoshiaki Kitaguchi, Katsunori Yamaoka (Tokyo Tech) IN2018-139
In recent years, applications such as Intelligent Transportation System, Cyber-physical System, Wireless Sensor Networks... [more] IN2018-139
pp.331-336
HWS, VLD 2019-02-27
15:45
Okinawa Okinawa Ken Seinen Kaikan Timing Correction by Constrained Temperature Dependent Clock Skew
Mineo Kaneko (JAIST) VLD2018-103 HWS2018-66
This report treats temperature dependent clock skew scheduling for a general class of sequential circuits. Previous stud... [more] VLD2018-103 HWS2018-66
pp.61-66
WBS, MICT 2018-07-06
09:45
Kanagawa Yokohama Mitsui Building [Poster Presentation] Performance Evaluation of Blind equalization for OFDM transmission without CP
Yusuke Saito, Teruyuki Miyajima, Yoshiki Sugitani (Ibaraki Univ.) WBS2018-5 MICT2018-25
In this article, we study time-domain equalization to suppress inter-symbol interference in OFDM transmission without CP... [more] WBS2018-5 MICT2018-25
pp.1-6
NS, IN
(Joint)
2017-03-03
15:50
Okinawa OKINAWA ZANPAMISAKI ROYAL HOTEL Hole Bypassing Geographic Routing Protocol with Delay Guarantee in WSNs
Phi Le Nguyen (SOKENDAI), Yusheng Ji (NII/SOKENDAI), Thanh Trung Nguyen, Thanh-Hung Nguyen (HUST) IN2016-163
Wireless sensor networks are used in many mission-critical applications such as target tracking in battlefield, emergenc... [more] IN2016-163
pp.395-400
IN, RCS
(Joint)
2016-05-19
12:00
Tokyo Kikai-Shinko-Kaikan Bldg. Note on Bistability of Slotted ALOHA Systems with Delay Constraints
Takayuki Horiuchi, Katsumi Sakakibara, Jumpei Taketsugu (Okayama Pref. Univ.) IN2016-4
Bistable behavior of slotted ALOHA systems has been extensively investigated,
since 1970s.
It is proved that
bistable... [more]
IN2016-4
pp.19-24
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2015-12-03
09:20
Nagasaki Nagasaki Kinro Fukushi Kaikan A Handshake-delay-aware Scheduling Algorithm in High-level Synthesis for Four-phase Dual-rail Asynchronous Systems
Kohta Itani, Tsuyoshi Iwagaki, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.) VLD2015-60 DC2015-56
This report is intended to discuss the scheduling problem in high-level synthesis~(HLS) for four-phase dual-rail asynchr... [more] VLD2015-60 DC2015-56
pp.147-152
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2015-12-03
14:10
Nagasaki Nagasaki Kinro Fukushi Kaikan An approach to LFSR/MISR seed generation for delay fault BIST
Daichi Shimazu, Satishi Ohtake (Oita Univ.) VLD2015-70 DC2015-66
In this paper, we propose a method of LFSR/MISR seed generation for delay fault BIST.
A widely used conventional way to... [more]
VLD2015-70 DC2015-66
pp.213-218
AP 2014-06-12
13:30
Tokyo Kikai-Shinko-Kaikan Bldg. Novel Wideband Decoupling Network corresponding to Group Delay in Coupling Phase between Two Antennas
Hidetoshi Makimura, Kengo Nishimoto, Toru Fukasawa, Hiroaki Miyashita (Mitsubishi Electric) AP2014-42
This paper presents a novel decoupling network which reduces coupling between antennas in multi-antenna systems. Althoug... [more] AP2014-42
pp.13-18
NLP 2014-01-21
13:50
Hokkaido Niseko Park Hotel Solving Optimization Problems Using DS-net and IDL model
Yuto Watanabe (Tohoku Univ.), Yoshihiro Hayakawa (SNCT), Shigeo Sato, Koji Nakajima (Tohoku Univ.) NLP2013-137
The Inverse function DelayLess (IDL) model has been proposed as one of novel neural models. Since the IDL model can set ... [more] NLP2013-137
pp.45-50
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2013-11-28
09:45
Kagoshima   An Area Constraint-Based Fault-Secure HLS Algorithm for RDR Architectures Considering Trade-Off between Reliability and Time Overhead
Kazushi Kawamura, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.) VLD2013-79 DC2013-45
With process technology scaling, decreasing reliability caused by soft errors as well as increasing the average intercon... [more] VLD2013-79 DC2013-45
pp.129-134
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2013-11-29
08:55
Kagoshima   A Method of LFSR Seed Generation for Delay Fault BIST
Taro Honda, Satoshi Ohtake (Oita Univ.) VLD2013-92 DC2013-58
In this paper, we propose a method to generate LFSR seeds for delay fault BIST. A conventional way to generate seeds is ... [more] VLD2013-92 DC2013-58
pp.227-231
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2013-11-29
09:45
Kagoshima   A Method of High Quality Transition Test Generation Using RTL Information
Hiroyuki Nakashima, Satoshi Ohtake (Oita Univ.) VLD2013-94 DC2013-60
With the miniaturization and high speed of large scale integrated circuits (VLSIs), it has become important to test dela... [more] VLD2013-94 DC2013-60
pp.239-244
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